Oscillation circuit and buffer thereof

1 . An oscillation circuit, comprising:

an oscillator, configured to provide at least one oscillation signal having a first frequency according to an analog control signal;

a buffer, coupled to the oscillator, comprising:

at least one input terminal, configured to receive the at least one oscillation signal;

at least one output terminal, configured to provide at least one buffered signal;

a buffer unit, coupled between the at least one input terminal and the at least one output terminal;

a first capacitor array, coupled to the buffer unit, and configured to change a first equivalent capacitance value of the first capacitor array according to at least one first digital signal; and

a second capacitor array, coupled to the buffer unit, and configured to change a second equivalent capacitance value of the second capacitor array according to at least one second digital signal;

wherein the at least one second digital signal is generated according to the analog control signal;

wherein the buffer has a first gain curve, the first gain curve has a first peak frequency, and the first peak frequency corresponds to the first frequency.

2 . The oscillation circuit of claim 1 , wherein the buffer further comprises:

an analog-to-digital converter, coupled to the second capacitor array, and configured to receive the analog control signal and to generate the at least one second digital signal according to the analog control signal.

3 . The oscillation circuit of claim 1 , wherein:

the at least one oscillation signal further has a second frequency;

the buffer further has a second gain curve, wherein the second gain curve has a second peak frequency; and

the second peak frequency corresponds to the second frequency.

4 . An oscillation circuit, comprising:

an oscillator, configured to provide at least one oscillation signal according to an analog control signal, wherein the at least one oscillation signal comprises a first oscillation signal and a second oscillation signal, wherein the oscillator comprises:

a first oscillator output terminal, configured to output the first oscillation signal;

a second oscillator output terminal, configured to output the second oscillation signal;

a first transistor, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to a first node, the second terminal is coupled to a first reference voltage terminal, and the control terminal is coupled to a second node;

a second transistor, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to the second node, the second terminal is coupled to the first reference voltage terminal, and the control terminal is coupled to the first node, wherein the first node is coupled to the first oscillator output terminal, and the second node is coupled to the second oscillator output terminal; and

an oscillator capacitor array, coupled between the first node and the second node and configured to change an equivalent capacitance value of the oscillator capacitor array according to at least one first digital signal;

a buffer, coupled to the oscillator, comprising:

at least one input terminal, configured to receive the at least one oscillation signal;

at least one output terminal, configured to provide at least one buffered signal;

a buffer unit, coupled between the at least one input terminal and the at least one output terminal;

a first capacitor array, coupled to the buffer unit, and configured to change a first equivalent capacitance value of the first capacitor array according to the at least one first digital signal; and

a second capacitor array, coupled to the buffer unit, and configured to change a second equivalent capacitance value of the second capacitor array according to at least one second digital signal;

wherein the at least one second digital signal is generated according to the analog control signal.

5 . The oscillation circuit of claim 4 , wherein the at least one input terminal of the buffer comprises a first input terminal, the at least one output terminal of the buffer comprises a first output terminal, and the at least one buffered signal comprises a first buffered signal, wherein the buffer unit comprises:

a third transistor, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to a third node, the second terminal is coupled to a second reference voltage terminal, and the control terminal is coupled to the first input terminal and is configured to receive the first oscillation signal, wherein the third node is coupled to the first output terminal and is configured to output the first buffered signal.

6 . The oscillation circuit of claim 5 , wherein the at least one input terminal further comprises a second input terminal, the at least one output terminal further comprises a second output terminal, and the at least one buffered signal further comprises a second buffered signal, wherein the buffer unit further comprises:

a fourth transistor, comprising a first terminal, a second terminal, and a control terminal, wherein the first terminal is coupled to a fourth node, the second terminal is coupled to the second reference voltage terminal, and the control terminal is coupled to the second input terminal and is configured to receive the second oscillation signal, wherein the fourth node is coupled to the second output terminal and is configured to output the second buffered signal.

7 . The oscillation circuit of claim 6 , wherein:

the oscillator further comprises at least one varactor, coupled between the first node and the second node and configured to change a capacitance value of the at least one varactor according to the analog control signal;

the second capacitor array of the buffer is coupled between the third node and the fourth node, and the second capacitor array comprises a first capacitor and a first switch coupled in series.

8 . The oscillation circuit of claim 7 , wherein a control terminal of the first switch of the second capacitor array is configured to receive a first one of the at least one second digital signal, and the first switch of the second capacitor array is turned on or off according to the first one, thereby changing the second equivalent capacitance value of the second capacitor array.

9 . The oscillation circuit of claim 8 , wherein the second capacitor array further comprises a second capacitor and a second switch coupled in series, wherein a control terminal of the second switch of the second capacitor array is configured to receive a second one of the at least one second digital signal, and the second switch of the second capacitor array is turned on or off according to the second one, thereby changing the second equivalent capacitance value of the second capacitor array.

10 . The oscillation circuit of claim 7 , wherein the at least one varactor comprises:

a first varactor and a second varactor, wherein a first terminal of the first varactor is coupled to the first node, a first terminal of the second varactor is coupled to a second terminal of the first varactor, and a second terminal of the second varactor is coupled to the second node.

11 . The oscillation circuit of claim 6 , wherein:

the oscillator capacitor array of the oscillator comprises a first capacitor and a first switch coupled in series;

the first capacitor array of the buffer is coupled between the third node and the fourth node, and the first capacitor array comprises a first capacitor and a first switch coupled in series;

wherein a control terminal of the first switch of the oscillator capacitor array is configured to receive a first one of the at least one first digital signal, and the first switch of the oscillator capacitor array is turned on or off according to the first one, thereby changing the equivalent capacitance value of the oscillator capacitor array;

wherein a control terminal of the first switch of the first capacitor array is configured to receive the first one of the at least one first digital signal, and the first switch of the first capacitor array is turned on or off according to the first one, thereby changing the first equivalent capacitance value of the first capacitor array.

12 . The oscillation circuit of claim 11 , wherein the oscillator capacitor array further comprises a second capacitor and a second switch coupled in series, and the first capacitor array further comprises a second capacitor and a second switch coupled in series;

wherein a control terminal of the second switch of the oscillator capacitor array is configured to receive a second one of the at least one first digital signal, and the second switch of the oscillator capacitor array is turned on or off according to the second one, thereby changing the equivalent capacitance value of the oscillator capacitor array;

wherein a control terminal of the second switch of the first capacitor array is configured to receive the second one of the at least one first digital signal, and the second switch of the first capacitor array is turned on or off according to the second one, thereby changing the first equivalent capacitance value of the first capacitor array.

13 . The oscillation circuit of claim 4 , wherein the oscillator further comprises:

a first current source, coupled between the second terminal of the first transistor and the first reference voltage terminal, and coupled between the second terminal of the second transistor and the first reference voltage terminal; and

a first inductor, coupled between the first node and the second node.

14 . A buffer for buffering at least one oscillation signal having a first frequency from an oscillator, comprising:

at least one input terminal, configured to receive the at least one oscillation signal;

at least one output terminal, configured to provide at least one buffered signal;

a buffer unit, coupled between the at least one input terminal and the at least one output terminal;

a first capacitor array, coupled to the buffer unit and configured to change a first equivalent capacitance value of the first capacitor array according to at least one first digital signal; and

a second capacitor array, coupled to the buffer unit and configured to change a second equivalent capacitance value of the second capacitor array according to at least one second digital signal;

wherein the at least one second digital signal is generated according to an analog control signal, and the analog control signal is configured to adjust a frequency of the at least one oscillation signal;

wherein the buffer has a first gain curve, the first gain curve has a first peak frequency, and the first peak frequency corresponds to the first frequency.

15 . The buffer of claim 14 , further comprising:

an analog-to-digital converter, coupled to the second capacitor array, configured to receive the analog control signal and configured to generate the at least one second digital signal according to the analog control signal.

16 . The buffer of claim 14 , wherein the at least one oscillation signal further has a second frequency and the buffer further has a second gain curve, wherein the second gain curve has a second peak frequency, and the second peak frequency corresponds to the second frequency.

17 . The buffer of claim 14 , wherein the buffer further comprises a second inductor coupled to the buffer unit.

18 . The buffer of claim 14 , wherein the buffer further comprises a second current source coupled to the buffer unit.