IP Library Granted Patent US 12671369
Granted Patent B2
US 12671369 · App. 18/476,962 · Granted Jun 30, 2026

Reduction of artefacts in multi-channel systems

Inventors: Rupesh Khare (Newbury, GB); Mehul Mistry (Newbury, GB); Gautham Sathyanarayanan (Newbury, GB)
Assignee: Cirrus Logic Inc.
H03F1/523H03F3/45071H03F2200/441
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Quick Facts
Patent No.
US 12671369
App. No.
18/476,962
Granted
Jun 30, 2026
Kind
B2
Abstract

Circuitry for driving first and second loads, the circuitry comprising: a first output signal path for supplying a first driving signal to the first load; a second output signal path for supplying a second driving signal to the second load; sequencer circuitry configured to initiate a first state change in the first output signal path and a second state change in the second output signal path, wherein the sequencer circuitry is configured to control the initiation of the first and second state changes such that the second state change is not synchronised with the first state change.

Claims (25)

1 . Circuitry for driving first and second loads, the circuitry comprising:

a first output signal path for supplying a first driving signal to the first load;

a second output signal path for supplying a second driving signal to the second load;

a common ground path coupled to the first and second output signal paths, the common ground path including a common resistor, wherein the first output signal path comprises a first feedback path including the common resistor and the second output signal path comprises a second feedback path including the common resistor; and

sequencer circuitry configured to:

disable an active zero-crossing detection function of the circuitry; and

initiate a first state change in the first output signal path and a second state change in the second output signal path, wherein the sequencer circuitry is configured to control the initiation of the first and second state changes such that the second state change is not synchronised with the first state change.

2 . Circuitry according to claim 1 , wherein:

the first output signal path comprises first digital to analog converter (DAC) circuitry and first amplifier circuitry; and

the second output signal path comprises second digital to analog converter (DAC) circuitry and second amplifier circuitry.

3 . Circuitry according to claim 1 , wherein the first load and/or the second load comprises an audio output transducer.

4 . Circuitry according to claim 1 , wherein the first load and/or the second load comprises a haptic output transducer.

5 . Circuitry according to claim 2 , wherein the first and second DAC circuitry comprise ground-referenced DAC circuitry, and wherein the first and second amplifier circuitry comprise split-supply amplifier circuitry.

6 . Circuitry according to claim 2 , further comprising:

a first clamp path coupled to an output of the first amplifier circuitry; and

a second clamp path coupled to an output of the second amplifier circuitry.

7 . Circuitry according to claim 6 , wherein the first and second state changes occur during a start-up process or a shut-down process for the circuitry.

8 . Circuitry according to claim 7 , wherein the sequencer circuitry is configured to, during the start-up process, enable the second output signal path after enabling the first output signal path.

9 . Circuitry according to claim 7 , wherein the sequencer circuitry is configured to, during the shut-down process, disable the second output signal path after disabling the first output signal path.

10 . An integrated circuit comprising circuitry according to claim 1 .

11 . A host device comprising circuitry according to claim 1 .

12 . A host device according to claim 11 , wherein the host device comprises a laptop, notebook, netbook or tablet computer, a gaming device, a games console, a controller for a games console, a virtual reality (VR) or augmented reality (AR) device, a mobile telephone, a portable audio player, a portable device, an accessory device for use with a laptop, notebook, netbook or tablet computer, a gaming device, a games console a VR or AR device, a mobile telephone, a portable audio player or other portable device.

13 . A method for reducing artefacts in a multi-channel system during a state change, the method comprising:

disabling an active zero-crossing detection function of the multi-channel system; and

controlling initiation of the state change in each channel such that the state change in one channel is not synchronised with the state change in another channel, wherein the multi-channel system comprises a common ground path for at least the one channel and the another channel, the common ground path comprising a common resistor that is common to feedback paths of the one channel and the another channel.