IP Library Granted Patent US 12671370
Granted Patent B2
US 12671370 · App. 18/844,094 · Granted Jun 30, 2026

Wireless communication apparatus and wireless communication method

Inventor: Takuji Mochizuki (Tokyo, JP)
Assignee: NEC CORPORATION
H03F3/19H04B1/04H03F2200/451H04B2001/0416H04L5/14
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Quick Facts
Patent No.
US 12671370
App. No.
18/844,094
Filed
Sep 5, 2024
Granted
Jun 30, 2026
Kind
B2
Art Unit
2631
USPC
375/297
Abstract

An AAS ( 10 ) according to the present disclosure includes a signal processing unit ( 11 ), a transmitter ( 12 ) provided at a stage following the signal processing unit ( 11 ), and a transmission amplifier ( 13 ) provided at a stage following the transmitter ( 12 ). The signal processing unit ( 11 ) detects whether there is a transmission signal, and inserts a stabilization signal for stabilizing characteristics of the transmission amplifier ( 13 ) in a time domain preceding a time domain of the transmission signal when the transmission signal is detected, so that the stabilization signal passes through the transmitter ( 12 ) and the transmission amplifier ( 13 ) before the transmission signal passes through the transmitter ( 12 ) and the transmission amplifier ( 13 ).

Claims (42)

1 . A wireless communication apparatus comprising:

a processor;

a transmitter provided at a stage following the processor; and

a transmission amplifier provided at a stage following the transmitter,

wherein the processor is configured to:

detect whether there is a transmission signal; and

insert a stabilization signal for stabilizing characteristics of the transmission amplifier in a time domain preceding a time domain of the transmission signal when the transmission signal is detected, so that the stabilization signal passes through the transmitter and the transmission amplifier before the transmission signal passes through the transmitter and the transmission amplifier, wherein

when the wireless communication apparatus performs a time division duplex (TDD) operation, a time width of the stabilization signal is set within a time width of a period for switching the transmitter from a turn-off state to a turn-on state.

2 . The wireless communication apparatus according to claim 1 , wherein the processor includes:

a signal storage memory configured to store the stabilization signal;

an inverse fast Fourier transform (IFFT) circuit configured to convert the transmission signal from a signal in a frequency domain to a signal in a time domain;

a detector provided at a stage preceding the IFFT circuit, and configured to detect whether there is the transmission signal in the frequency domain; and

an adder configured to add the stabilization signal stored in the signal storage memory to the time domain preceding the time domain of the transmission signal output from the IFFT circuit when the transmission signal is detected by the detector.

3 . The wireless communication apparatus according to claim 1 , wherein the stabilization signal is a signal for stabilizing a gain, an output, and a nonlinear distortion characteristic of the transmission amplifier by generating a current collapse and a gain/drain lag in the transmission amplifier when input to the transmission amplifier.

4 . A wireless communication apparatus comprising:

a processor;

a transmitter provided at a stage following the processor; and

a transmission amplifier provided at a stage following the transmitter,

wherein the processor is configured to:

detect whether there is a transmission signal; and

insert a stabilization signal for stabilizing characteristics of the transmission amplifier in a time domain preceding a time domain of the transmission signal when the transmission signal is detected, so that the stabilization signal passes through the transmitter and the transmission amplifier before the transmission signal passes through the transmitter and the transmission amplifier, wherein

a frequency bandwidth of the stabilization signal is set to a frequency bandwidth of a component carrier used to transmit the transmission signal.

5 . The wireless communication apparatus according to claim 4 , wherein the processor includes:

a signal storage memory configured to store the stabilization signal;

an inverse fast Fourier transform (IFFT) circuit configured to convert the transmission signal from a signal in a frequency domain to a signal in a time domain;

a detector provided at a stage preceding the IFFT circuit, and configured to detect whether there is the transmission signal in the frequency domain; and

an adder configured to add the stabilization signal stored in the signal storage memory to the time domain preceding the time domain of the transmission signal output from the IFFT circuit when the transmission signal is detected by the detector.

6 . The wireless communication apparatus according to claim 4 , wherein the stabilization signal is a signal for stabilizing a gain, an output, and a nonlinear distortion characteristic of the transmission amplifier by generating a current collapse and a gain/drain lag in the transmission amplifier when input to the transmission amplifier.

7 . A wireless communication apparatus comprising:

a processor;

a transmitter provided at a stage following the processor; and

a transmission amplifier provided at a stage following the transmitter,

wherein the processor is configured to:

detect whether there is a transmission signal; and

insert a stabilization signal for stabilizing characteristics of the transmission amplifier in a time domain preceding a time domain of the transmission signal when the transmission signal is detected, so that the stabilization signal passes through the transmitter and the transmission amplifier before the transmission signal passes through the transmitter and the transmission amplifier, wherein

a power level of the stabilization signal is set to a power level at which an output of the transmission amplifier becomes a maximum rated root mean square (RMS) level and which is the same power level as that of the transmission signal.

8 . The wireless communication apparatus according to claim 7 , wherein the processor includes:

a signal storage memory configured to store the stabilization signal;

an inverse fast Fourier transform (IFFT) circuit configured to convert the transmission signal from a signal in a frequency domain to a signal in a time domain;

a detector provided at a stage preceding the IFFT circuit, and configured to detect whether there is the transmission signal in the frequency domain; and

an adder configured to add the stabilization signal stored in the signal storage memory to the time domain preceding the time domain of the transmission signal output from the IFFT circuit when the transmission signal is detected by the detector.

9 . The wireless communication apparatus according to claim 7 , wherein the stabilization signal is a signal for stabilizing a gain, an output, and a nonlinear distortion characteristic of the transmission amplifier by generating a current collapse and a gain/drain lag in the transmission amplifier when input to the transmission amplifier.