Low latency, error relative, Reed-Solomon decoder
The device includes an interface configured to enable network communications, a memory, and one or more processors coupled to the interface and the memory, and configured to: receive a message, process the message using forward error correction, in response to a predetermined condition, bypass at least some iterative calculations that are performed by the forward error correction, and output a processed message. The predetermined condition may be that all coefficients of a syndrome representative of the message are zero or that degree of a value in the iterative calculations is lower than a maximum number of errors correctable by the forward error correction. A latency resulting from the processing of the message using the forward error correction is proportional to a number of errors in the message.
1 . A device comprising:
an interface configured to enable network communications;
a memory; and
one or more processors coupled to the interface and the memory, and configured to:
receive a message;
process the message using forward error correction;
in response to a predetermined condition that a degree of a value resulting from at least one iterative calculation that is performed by the forward error correction is lower than a maximum number of errors correctable by the forward error correction, prematurely terminate an iterative polynomial calculation process of the forward error correction; and
output a processed message,
wherein a latency resulting from processing the message using the forward error correction is proportional to a number of errors in the message.
2 . The device of claim 1 , wherein the forward error correction is performed with a Reed-Solomon forward error correction decoder.
3 . The device of claim 2 , wherein the one or more processors are configured to bypass at least some iterative calculations of a key equation solver of the Reed-Solomon forward error correction decoder.
4 . The device of claim 3 , wherein the at least some iterative calculations comprise calculations according to Euclid's method.
5 . The device of claim 1 , wherein the one or more processors are configured to receive another message and bypass operations of a key equation solver of the device in response to all coefficients of a syndrome polynomial of the another message being zero.
6 . The device of claim 5 , wherein the another message contains no errors, and the one or more processors are configured to bypass all iterative calculations that are to be performed by the forward error correction on the another message.
7 . The device of claim 1 , wherein the value is a residue polynomial.
8 . A method comprising:
receiving a message;
processing the message using forward error correction;
in response to a predetermined condition that a degree of a value resulting from at least one iterative calculation that is performed by the forward error correction is lower than a maximum number of errors correctable by the forward error correction, prematurely terminating an iterative polynomial calculation process of the forward error correction; and
outputting a processed message.
9 . The method of claim 8 , further comprising performing the forward error correction with a Reed-Solomon forward error correction decoder.
10 . The method of claim 9 , further comprising bypassing at least some iterative calculations of a key equation solver of the Reed-Solomon forward error correction decoder.
11 . The method of claim 10 , wherein the at least some iterative calculations comprise calculations according to Euclid's method.
12 . The method of claim 8 , further comprising receiving another message and bypassing operations of a key equation solver of the forward error correction in response to all coefficients of a syndrome polynomial that is representative of the another message being zero.
13 . The method of claim 12 , wherein the another message contains no errors.
14 . The method of claim 12 , further comprising, for the another message, bypassing all iterative calculations that are performed by the forward error correction.
15 . The method of claim 8 , wherein the value is a residue polynomial.
16 . The method of claim 8 , wherein a latency resulting from processing the message using forward error correction is proportional to a number of errors in the message.
17 . One or more non-transitory computer readable storage media encoded with instructions that, when executed by a processor, cause the processor to:
receive a message;
process the message using forward error correction;
in response to a predetermined condition that a degree of a value resulting from at least one iterative calculation that is performed by the forward error correction is lower than a maximum number of errors correctable by the forward error correction, prematurely terminate an iterative polynomial calculation process by the forward error correction; and
output a processed message.
18 . The one or more non-transitory computer readable storage media of claim 17 , wherein the instructions are configured to cause the processor to receive another message and bypass all iterative calculations that are performed by the forward error correction when all coefficients of a syndrome polynomial that is representative of the another message are zero.
19 . The one or more non-transitory computer readable storage media of claim 17 , wherein the forward error correction is performed with a Reed-Solomon forward error correction decoder.
20 . The one or more non-transitory computer readable storage media of claim 17 , wherein the value is a residue polynomial.