Printed circuit board and substrate including electronic component embedded therein

1 . A printed circuit board, comprising:

a first insulating layer having a first modulus;

a first wiring layer;

a second insulating layer disposed on the first insulating layer and having a second modulus, the second insulating layer comprising a third insulating layer contacting the first insulating layer and a fourth insulating layer disposed on the third insulating layer; and

a cavity penetrating the second insulating layer,

wherein the first wiring layer includes a first wiring pattern of which at least a portion of one surface exposed from one surface of the first insulating layer is covered by and in contact with the second insulating layer, and a second wiring pattern of which at least a portion of one surface exposed from one surface of the first insulating layer is exposed by the cavity,

wherein the first wiring pattern includes a first conducting via penetrating the third insulating layer and connecting the first wiring pattern to a third wiring layer disposed on or in the third insulating layer, the fourth insulating layer covering at least a portion of a surface of the third wiring layer exposed through the third insulating layer,

wherein the second modulus is greater than the first modulus,

wherein an upper surface portion of the first insulating layer forms a bottom surface of the cavity, and is not covered by the second insulating layer in a thickness direction,

wherein an interface between the first and second insulating layers is coplanar with or lower than an upper surface of the second wiring pattern when viewed in a cross-section view, and

wherein the second wiring pattern is connected to a conductive via penetrating at least a portion of the first insulating layer.

2 . The printed circuit board of claim 1 , wherein the second modulus is four times the first modulus or greater.

3 . The printed circuit board of claim 2 ,

wherein the first insulating layer includes liquid crystal polymer, and

wherein the second insulating layer includes prepreg.

4 . The printed circuit board of claim 1 ,

wherein the cavity exposes at least a portion of one surface of the first insulating layer, and

wherein exposed one surface of the first insulating layer is provided as a bottom surface of the cavity.

5 . The printed circuit board of claim 1 , further comprising:

a third wiring layer buried in the fourth insulating layer and having one surface exposed from one surface of the fourth insulating layer; and

a wiring via layer penetrating the fourth insulating layer and connecting at least a portion of the second wiring layer to at least a portion of the third wiring layer.

6 . The printed circuit board of claim 1 , wherein the first wiring layer is buried in the first insulating layer and exposed from one surface of the first insulating layer.

7 . The printed circuit board of claim 1 , wherein an edge portion of a bottom surface of the cavity is formed of an insulating material.

8 . A printed circuit board, comprising:

a first insulating body including a first insulating layer having a first etch rate for microblasting and a first wiring layer;

a second insulating layer having a second etch rate for microblasting, the second etch rate being greater than the first etch rate, the second insulating layer comprising a third insulating layer contacting the first insulating layer and a fourth insulating layer disposed on the third insulating layer; and

a cavity penetrating the second insulating layer and exposing a surface of the first insulating layer;

wherein the first wiring layer includes a first wiring pattern of which at least a portion of one surface exposed from one surface of the first insulating layer is covered by and in contact with the second insulating layer, and a second wiring pattern of which at least a portion of one surface exposed from one surface of the first insulating layer is exposed by the cavity,

wherein the first wiring pattern includes a first conducting via penetrating the third insulating layer and connecting the first wiring pattern to a third wiring layer disposed on or in the third insulating layer, the fourth insulating layer covering at least a portion of a surface of the third wiring layer exposed through the third insulating layer, and

wherein an upper surface portion of the first insulating layer forms a bottom surface of the cavity, and is not covered by the second insulating layer in a thickness direction.

9 . The printed circuit board of claim 8 , further comprising an electronic component disposed in the cavity such that at least a portion of the bottom of the cavity is exposed; and

a first wiring layer disposed in or on the first insulating layer, the first wiring layer being connected to the electronic component.

10 . The printed circuit board of claim 9 , further comprising a second insulating body disposed on the second insulating layer, covering at least a portion of the second insulating layer and at least a portion of the electronic component, and filling at least a portion of the cavity.

11 . The printed circuit board of claim 8 , wherein the second etch rate is at least ten times greater than the first etch rate.

12 . The printed circuit board of claim 8 , further comprising a second insulating body disposed on the second insulating layer; and

a second wiring layer disposed on or in the second insulating layer, the second wiring layer being connected to the first wiring layer.

13 . The printed circuit board of claim 8 , wherein the first wiring layer is buried in the first insulating layer and exposed from one surface of the first insulating layer.