IP Library Granted Patent US 12672239
Granted Patent B2
US 12672239 · App. 17/956,384 · Granted Jun 30, 2026

Hybrid bonded passive integrated devices on glass core

Inventors: Kristof Darmawikarta (Chandler, AZ); Srinivas Venkata Ramanuja Pietambaram (Chandler, AZ); Gang Duan (Chandler, AZ); Sameer Paital (Chandler, AZ)
Assignee: Intel Corporation
H05K1/186H01F27/022H01F27/292H01F41/005H01G2/065H01G2/10H10W70/635H10W74/141H10W90/00H05K2201/10015H05K2201/1003H10W90/794
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Quick Facts
Patent No.
US 12672239
App. No.
17/956,384
Granted
Jun 30, 2026
Kind
B2
Abstract

An electronic device includes a substrate including a glass core layer and first contact pads on a first surface of the glass core layer; one or more discrete passive electronic components disposed on the first surface of the glass core layer, the one or more discrete passive electronic components including second contact pads on a bottom surface of the one or more discrete passive electronic components; and hybrid bonds between the first contact pads of the glass core layer and the second contact pads of the one or more discrete passive electronic components.

Claims (39)

1 . An electronic device comprising:

a glass core layer;

through glass vias (TGVs) extending through only the glass core layer;

first contact pads on a first surface of the glass core layer and in direct contact with corresponding ones of the TGVs;

one or more discrete passive electronic components over the first surface of the glass core layer, each of the one or more discrete passive electronic components including second contact pads on a bottom surface of the one or more discrete passive electronic components;

hybrid bonds comprising first bonds between the first contact pads of the glass core layer and the second contact pads of the one or more discrete passive electronic components; and

a third dielectric material over the first surface of the glass core layer, and over one or more of the TGVs that are adjacent to the discrete passive electronic components.

2 . The electronic device of claim 1 , including a first dielectric material on a first surface of the glass core layer and adjacent to the contact pads, and a second dielectric material adjacent to the second contact pads on the one or more discrete passive electronic components, wherein the hybrid bonds further comprise second bonds between the first dielectric material and the second dielectric material.

3 . The electronic device of claim 2 , wherein the first dielectric material includes silicon.

4 . The electronic device of claim 3 , wherein the first dielectric material includes one or both of nitrogen and carbon.

5 . The electronic device of claim 1 , including third contact pads on a second surface of the glass core layer, and wherein:

a first of the TGVs provide electrical continuity from the second contact pads of the one or more discrete passive electronic components to the third contact pads of the second surface of the glass core layer; and

a second of the TGVs provide electrical continuity from the first contact pads adjacent to the discrete passive electronic components to the third contact pads of the second surface of the glass core layer.

6 . The electronic device of claim 5 , including a redistribution layer (RDL) on the second surface of the glass core layer and in contact with at least one of the third contact pads.

7 . The electronic device of claim 1 , wherein the one or more discrete passive electronic components include one or more inductors or capacitors.

8 . The electronic device of claim 7 , wherein the one or more discrete passive electronic components include one or more inductors.

9 . The electronic device of claim 1 , wherein:

the third dielectric material extends over the one or more of the one or more discrete passive electronic components;

a top surface of the one or more discrete passive components comprises additional contact pads; and

at least one via in the third dielectric material and that contacts at least one of the additional contact pads.

10 . A method of making an electronic device, the method comprising:

forming a first dielectric layer in direct contact with a first surface of a glass core layer;

forming contact pads on the first surface of the glass core layer, adjacent to the first dielectric layer, and in direct contact with through glass vias (TGVs) that extend through only the glass core layer;

disposing one or more discrete passive electronic components on the dielectric layer;

forming hybrid bonds comprising first bonds between the contact pads on the first surface of the glass core layer and contact pads on a first surface of the one or more discrete passive electronic components and second bonds between a second dielectric layer of the one or more discrete passive electronic components and the first dielectric layer; and

depositing a third dielectric layer over the first surface of the glass core layer, and over one or more of the TGVs that are adjacent to the discrete passive electronic components.

11 . The method of claim 10 , wherein the forming hybrid bonds includes:

forming openings in the first dielectric layer;

disposing a conductive material in the openings in the dielectric layer to form the contact pads on the first surface of the glass core layer, wherein a top surface of the contact pads is recessed lower than a top surface of the dielectric layer; and

heating the glass core layer and the one or more discrete passive components to bond the contact pads of the glass core layer to the contact pads of the one or more discrete passive electronic components and to bond the first and second dielectric layers.

12 . The method of claim 11 ,

wherein forming the first dielectric layer includes forming dielectric material that includes silicon on the first surface of the glass core layer.

13 . The method of claim 10 , further including:

forming a third dielectric layer over the one or more of the one or more discrete passive electronic components; and

forming one or more vias in the third dielectric layer that contact at least one contact pad on a second surface of at least one of the one or more discrete passive electronic components.

14 . The method of claim 13 , wherein the forming the third dielectric layer includes forming a redistribution layer (RDL) on the first surface of the glass core layer and over the one or more of the one or more discrete passive electronic components.

15 . The method of claim 10 , further including

forming a redistribution layer on the second surface of the glass core layer.

16 . The method of claim 10 , wherein disposing the one or more discrete passive electronic components includes disposing one or more discrete inductors or discrete capacitors on the dielectric layer.