Three-dimensional memory devices and methods for forming the same
In certain aspects, a three-dimensional (3D) memory device includes channel structures in a first region and word line pick-up structures in a first portion of a second region. The first region and the second region are arranged in a first direction. The 3D memory device also includes word lines each extending in the first region and a second portion of the second region. The first portion and the second portion of the second region are arranged in a second direction perpendicular to the first direction. The 3D memory device also includes dummy channel structures in the second portion of the second region. Adjacent channel structures are spaced apart from each other by a first distance. Adjacent dummy channel structures are spaced apart from each other by a second distance that is smaller than the first distance.
1 . A three-dimensional (3D) memory device, comprising:
channel structures in a first region;
word line pick-up structures in a first portion of a second region, the first region and the second region being arranged in a first direction;
word lines each extending in the first region and a second portion of the second region, the first portion and the second portion of the second region being arranged in a second direction perpendicular to the first direction, and the first portion comprising a dielectric stack structure that comprises interleaved first dielectric layers and second dielectric layers; and
dummy channel structures in the second portion of the second region,
wherein:
adjacent channel structures are spaced apart from each other by a first distance; and
adjacent dummy channel structures are spaced apart from each other by a second distance that is smaller than the first distance.
2 . The 3D memory device of claim 1 , wherein the first distance is a shortest distance between the adjacent channel structures.
3 . The 3D memory device of claim 1 , wherein the first distance is measured between edges of adjacent channel structures.
4 . The 3D memory device of claim 1 , wherein the second distance is a longest distance between the adjacent dummy channel structures.
5 . The 3D memory device of claim 1 , wherein the second distance is measured between edges of adjacent dummy channel structures.
6 . The 3D memory device of claim 1 , wherein a cross-section of at least one of the dummy channel structures is of a circular shape.
7 . The 3D memory device of claim 1 , wherein a cross-section of at least one of the dummy channel structures is of an oval shape.
8 . The 3D memory device of claim 7 , wherein the dummy channel structures are staggered along the second direction.
9 . The 3D memory device of claim 7 , wherein a major axis of the cross-section of the at least one of the dummy channel structures is parallel to the first direction.
10 . The 3D memory device of claim 7 , wherein a major axis of the cross-section of the at least one of the dummy channel structures is transversal to the first direction.
11 . The 3D memory device of claim 10 , wherein a major axis of the cross-section of the at least one of the dummy channel structures is perpendicular to the first direction.
12 . A three-dimensional (3D) memory device, comprising:
a first stack structure comprising interleaved conductive layers and first dielectric layers;
a second stack structure comprising interleaved second dielectric layers and the first dielectric layers;
word line pick-up structures extending into the second stack structure at different depths and each comprising a vertical contact, and an interconnect line in contact with the vertical contact and a respective one of the conductive layers in the first stack structure; and
dummy channel structures extending through the first stack structure,
wherein:
adjacent channel structures are spaced apart from each other by a first distance; and
adjacent dummy channel structures are spaced apart from each other by a second distance that is smaller than the first distance.
13 . The 3D memory device of claim 12 , wherein the first distance is a shortest distance between the adjacent channel structures.
14 . The 3D memory device of claim 12 , wherein the first distance is measured between edges of adjacent channel structures.
15 . The 3D memory device of claim 12 , wherein the second distance is a longest distance between the adjacent dummy channel structures.
16 . The 3D memory device of claim 12 , wherein the second distance is measured between edges of adjacent dummy channel structures.
17 . The 3D memory device of claim 1 , wherein in the first portion, one of the word lines extends within the dielectric stack structure that comprises the interleaved first dielectric layers and second dielectric layers.
18 . The 3D memory device of claim 1 , wherein portions of the dielectric stack structure, comprising the interleaved first dielectric layers and second dielectric layers, are arranged below respective ones of the word line pick-up structures.
19 . The 3D memory device of claim 1 , wherein a word line pick-up structure of the word line pick-up structures extends through a portion of a dielectric stack structure comprising interleaved first dielectric layers and second dielectric layers without extending through another portion of the dielectric stack structure below the word line pick-up structure.
20 . The 3D memory device of claim 1 , wherein an interconnect line is arranged within the dielectric stack structure and configured to contact one of the word lines to a corresponding word line pick-up structure.