Memory device containing ferroelectric-spacer-ferroelectric memory elements and method of making the same

1 . A ferroelectric memory device, comprising:

an alternating stack of insulating layers and composite layers that are interlaced along a vertical direction;

a memory opening vertically extending through the alternating stack;

a memory opening fill structure located in the memory opening and comprising a vertical semiconductor channel and an inner ferroelectric material layer comprising a first ferroelectric material and laterally surrounding the vertical semiconductor channel; and

a vertical stack of electrically-non-insulating material portions located between the inner ferroelectric material layer and the composite layers,

wherein each of the composite layers comprises a respective electrically conductive layer and a respective outer ferroelectric material layer comprising a second ferroelectric material, embedding the respective electrically conductive layer, and contacting a respective electrically-non-insulating material portion within the vertical stack of electrically-non-insulating material portions;

wherein the vertical stack of electrically-non-insulating material portions comprises at least one semiconductor material.

2 . The ferroelectric memory device of claim 1 , wherein each of the electrically-non-insulating material portions within the vertical stack of electrically-non-insulating material portions contacts a respective annular surface segment of an outer sidewall of the inner ferroelectric material layer.

3 . The ferroelectric memory device of claim 1 , wherein each electrically-non-insulating material portion within the vertical stack of electrically-non-insulating material portions comprises:

an inner sidewall;

an outer sidewall;

an annular top surface having a first inner periphery adjoined to a top periphery of the inner sidewall and a first outer periphery adjoined to a top periphery of the outer sidewall; and

an annular bottom surface having a second inner periphery adjoined to a bottom periphery of the inner sidewall and a second outer periphery adjoined to a bottom periphery of the outer sidewall.

4 . The ferroelectric memory device of claim 3 , wherein the inner sidewalls of the vertical stack of electrically-non-insulating material portions are vertically coincident with sidewalls of the insulating layers that contact the memory opening fill structure.

5 . The ferroelectric memory device of claim 1 , wherein each electrically-non-insulating material portion of the vertical stack of electrically-non-insulating material portions is in direct contact with and has a same vertical extent as a respective one of the outer ferroelectric material layers.

6 . The ferroelectric memory device of claim 1 , wherein each of the outer ferroelectric material layers comprises:

an upper horizontally-extending portion contacting a top surface of a respective one of the electrically conductive layers;

a lower horizontally-extending portion contacting a bottom surface of the respective one of the electrically conductive layers; and

a tubular portion laterally surrounding the memory opening fill structure and vertically connecting the upper horizontally-extending portion and the lower horizontally-extending portion.

7 . The ferroelectric memory device of claim 1 , further comprising a backside trench fill structure having a sidewall that contacts each of the insulating layers, the electrically conductive layers, and the outer ferroelectric material layers within the alternating stack.

8 . The ferroelectric memory device of claim 1 , wherein the inner ferroelectric material layer vertically extends continuously from a first horizontal plane including a bottommost surface of the alternating stack to a second horizontal plane including a topmost surface of the alternating stack.

9 . The ferroelectric memory device of claim 1 , wherein the vertical semiconductor channel vertically extends continuously through each of the electrically conductive layers within the alternating stack.

10 . The ferroelectric memory device of claim 1 , wherein the memory opening fill structure further comprises a dielectric core comprising a dielectric fill material and laterally surrounded by the vertical semiconductor channel.

11 . The ferroelectric memory device of claim 1 , further comprising a single crystalline semiconductor layer underlying the alternating stack and comprising a first single crystalline semiconductor material that has a first crystallographic lattice structure, wherein the vertical semiconductor channel comprises a second single crystalline semiconductor material having a second crystallographic lattice structure that is in epitaxial alignment with the first crystallographic lattice structure.

12 . The ferroelectric memory device of claim 1 , wherein:

the vertical semiconductor channel has a doping of a first conductivity type; and

the memory opening fill structure further comprises a drain region having a doping of a second conductivity type that is an opposite of the first conductivity type and contacting a top end portion of the vertical semiconductor channel.