High electron mobity transistor with gradient aluminum composition in barrier layer

1 . A semiconductor device comprising:

a substrate;

a channel layer that is provided on the substrate and that includes Ga and N; and

a barrier layer that is provided on the channel layer and includes a first surface that faces the channel layer and a second surface opposite to the first surface, the barrier layer containing Al, N, and at least one of Ga or In;

wherein an average value of an Al composition in the barrier layer is 30% or more, and

wherein the barrier layer has an Al composition profile, between the first surface and the second surface, that includes a first point within the barrier layer where the Al composition is 10% at a point reached upon increasing from the first surface toward the second surface and a second point within the barrier layer where the Al composition is 30% at a point reached upon increasing from the first surface toward the second surface, and includes a first straight line connecting the first point and the second point and having a slope of 20%/nm or more and 65%/nm or less.

2 . The semiconductor device according to claim 1 , wherein in the Al composition profile, a slope of a second straight line connecting the first point and a third point is 20%/nm or more and 65%/nm or less, in which the third point is a point where the Al composition first reaches 40% upon increasing from the first surface toward the second surface.

3 . The semiconductor device according to claim 1 , wherein the channel layer is a GaN layer, and the barrier layer is one of an AlGaN layer, an InAlN layer, or an InAlGaN layer.

4 . The semiconductor device according to claim 1 , wherein the average value of the Al composition in the barrier layer is 35% or more.

5 . The semiconductor device according to claim 1 ,

wherein the channel layer includes a third surface that faces the barrier layer,

wherein the channel layer includes a first layer and a portion closer to the substrate than the first layer, the first layer including the third surface and having a concentration of C of 1×10 16 cm −3 or less, and the portion having a concentration of C that exceeds 1×10 16 cm 3 , and

wherein a thickness of the first layer is 50 nm or more and 150 nm or less.

6 . A method of manufacturing a semiconductor device comprising:

forming, on a substrate, a channel layer that includes Ga and N; and

forming, on the channel layer, a barrier layer that includes a first surface that faces the channel layer and a second surface opposite to the first surface, the barrier layer containing Al, N, and at least one of Ga or In;

wherein an average value of an Al composition in the barrier layer is 30% or more, and

wherein the barrier layer has an Al composition profile, between the first surface and the second surface, that includes a first point within the barrier layer where the Al composition is 10% at a point reached upon increasing from the first surface toward the second surface and a second point within the barrier layer where the Al composition is 30% at a point reached upon increasing from the first surface toward the second surface, and includes a first straight line connecting the first point and the second point and having a slope of 20%/nm or more and 65%/nm or less.

7 . The method of manufacturing a semiconductor device according to claim 6 ,

wherein forming the barrier layer includes:

supplying, as a first condition, ammonia and an Al precursor to a deposition chamber without supplying a Ga precursor and an In precursor for a time such that a single layer is not formed;

supplying, as a second condition, ammonia, the Al precursor, and at least one of the Ga precursor or the In precursor to the deposition chamber to form a first semiconductor layer on the channel layer; and

supplying, as a third condition, ammonia, the Al precursor, and at least one of the Ga precursor or the In precursor to the deposition chamber to form a second semiconductor layer on the first semiconductor layer,

wherein a first pressure in the deposition chamber in the first condition, a second pressure in the deposition chamber in the second condition, a third pressure in the deposition chamber in the third condition, a first flow rate of ammonia in the first condition, a second flow rate of ammonia in the second condition, and a third flow rate of ammonia in the third condition satisfy at least one condition of: the first pressure and the second pressure are higher than the third pressure; or the first flow rate and the second flow rate are higher than the third flow rate.

8 . The method of manufacturing a semiconductor device according to claim 7 , wherein the first pressure is equal to the second pressure, and the first flow rate is equal to the second flow rate.

9 . The method of manufacturing a semiconductor device according to claim 7 , wherein the second pressure is equal to the third pressure, and the third flow rate is smaller than the second flow rate.

10 . The method of manufacturing a semiconductor device according to claim 7 ,

wherein, in the second condition, flow rates of ammonia, the Al precursor, and at least one of the Ga precursor or the In precursor supplied to the deposition chamber are adjusted so that an Al composition in the first semiconductor layer is 30% or less, and

wherein, in the third condition, flow rates of ammonia, the Al precursor, and at least one of the Ga precursor or the In precursor supplied to the deposition chamber are adjusted so that an Al composition in the second semiconductor layer is higher than 30%.

11 . The method of manufacturing a semiconductor device according to claim 7 , wherein, in the second condition, supplying is performed for a time such that a thickness of the first semiconductor layer is 0.5 nm or more and 3.0 nm or less.

12 . The method of manufacturing a semiconductor device according to claim 11 , wherein, in the second condition, supplying is performed for a time such that a thickness of the first semiconductor layer is 0.5 nm or more and 1.5 nm or less.

13 . The method of manufacturing a semiconductor device according to claim 6 ,

wherein the channel layer includes a third surface that faces the barrier layer,

wherein forming the channel layer includes forming a first layer and a portion closer to the substrate than the first layer, the first layer including the third surface, and having a concentration of C of 1×10 16 cm −3 or less, and the portion having a concentration of C that exceeds 1×10 16 cm 3 , and

wherein a thickness of the first layer is 50 nm or more and 150 nm or less.