Semiconductor device and manufacturing method of the semiconductor device

1 . A semiconductor device comprising:

a first insulator;

a second insulator over and in contact with a top surface of the first insulator;

a third insulator and a first conductor over and in contact with a top surface of the second insulator;

a fourth insulator over and in contact with a top surface of the third insulator and a top surface of the first conductor;

a fifth insulator over the fourth insulator;

a first oxide over the fifth insulator;

a second oxide over the first oxide;

a third oxide and a fourth oxide over the second oxide;

a second conductor over the third oxide;

a third conductor over the fourth oxide;

a sixth insulator over the second conductor;

a seventh insulator over the third conductor;

an eighth insulator over the fifth insulator to the seventh insulator;

a ninth insulator over the second oxide; and

a fourth conductor over the ninth insulator,

wherein the first conductor overlaps with the second oxide,

wherein the fourth conductor overlaps with the second oxide,

wherein the fourth insulator comprises a region overlapping with the ninth insulator and the fourth conductor between the second conductor and the third conductor,

wherein the ninth insulator is between the third oxide and the fourth oxide,

wherein the second oxide comprises a groove portion,

wherein a bottom surface of the groove portion is lower than a bottom surface of the third oxide and a bottom surface of the fourth oxide and higher than a bottom surface of the second oxide,

wherein hydrogen concentration of the first conductor is lower than hydrogen concentration of the fourth conductor,

wherein hydrogen concentration of the first insulator is lower than hydrogen concentration of the ninth insulator,

wherein hydrogen concentration of the second insulator is lower than the hydrogen concentration of the ninth insulator, and

wherein hydrogen concentration of the third insulator is lower than the hydrogen concentration of the ninth insulator.

2 . The semiconductor device according to claim 1 ,

wherein the first oxide to the fourth oxide each comprise indium, an element M, and zinc, and

wherein M is one or more kinds selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.

3 . The semiconductor device according to claim 1 ,

wherein the first conductor comprises tantalum and nitride.

4 . The semiconductor device according to claim 1 ,

wherein the first conductor comprises a first layer, a second layer in contact with a top surface and a side surface of the first layer, and a third layer in contact with a top surface of the second layer,

wherein the second layer is surrounded by the first layer and the third layer,

wherein the first layer and the third layer are configured to inhibit diffusion of hydrogen, and

wherein the fourth insulator is in contact with a top surface of the third layer.

5 . A semiconductor device comprising:

a first insulator;

a second insulator over and in contact with a top surface of the first insulator;

a third insulator and a first conductor over and in contact with a top surface of the second insulator;

a fourth insulator over and in contact with a top surface of the third insulator and a top surface of the first conductor;

a fifth insulator over the fourth insulator;

a first oxide over the fifth insulator;

a second oxide over the first oxide;

a second conductor and a third conductor over the second oxide;

a sixth insulator over the fifth insulator, the second conductor, and the third conductor, the sixth insulator comprising an opening reaching the second oxide;

a seventh insulator in the opening; and

a fourth conductor over the seventh insulator in the opening,

wherein the first conductor overlaps with the second oxide,

wherein the fourth insulator comprises a region overlapping with the seventh insulator and the fourth conductor between the second conductor and the third conductor,

wherein the fourth conductor overlaps with the second oxide,

wherein a bottom surface of the opening is lower than a top surface of the second oxide outside the opening and higher than a bottom surface of the second oxide,

wherein hydrogen concentration of the first conductor is lower than hydrogen concentration of the fourth conductor,

wherein hydrogen concentration of the first insulator is lower than hydrogen concentration of the seventh insulator,

wherein hydrogen concentration of the second insulator is lower than the hydrogen concentration of the seventh insulator, and

wherein hydrogen concentration of the third insulator is lower than the hydrogen concentration of the seventh insulator.

6 . The semiconductor device according to claim 5 ,

wherein the first oxide and the second oxide each comprise indium, an element M, and zinc, and

wherein M is one or more kinds selected from aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like.

7 . The semiconductor device according to claim 5 ,

wherein the first conductor comprises tantalum and nitride.

8 . The semiconductor device according to claim 5 ,

wherein the first insulator and the fourth insulator are configured to inhibit diffusion of hydrogen.

9 . The semiconductor device according to claim 8 , further comprising an eighth insulator over the sixth insulator, the seventh insulator, and the fourth conductor,

wherein the eighth insulator is configured to inhibit diffusion of hydrogen.

10 . The semiconductor device according to claim 5 ,

wherein the first conductor comprises a first layer, a second layer in contact with a top surface and a side surface of the first layer, and a third layer in contact with a top surface of the second layer,

wherein the second layer is surrounded by the first layer and the third layer,

wherein the first layer and the third layer are configured to inhibit diffusion of hydrogen, and

wherein the fourth insulator is in contact with a top surface of the third layer.