Semiconductor devices including buffer layer structure
A semiconductor device is provided. A semiconductor device includes: a first active pattern spaced apart from a substrate and extending in a first direction; a second active pattern spaced apart further from the substrate than the first active pattern and extending in the first direction; a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first active pattern and the second active pattern; a first source/drain region on at least one side surface of the gate structure and connected to the first active pattern; a second source/drain region on at least one side surface of the gate structure and connected to the second active pattern; and a buffer layer between the substrate and the first active pattern, the buffer layer containing germanium.
1 . A semiconductor device comprising:
a first active pattern spaced apart from a substrate and extending in a first direction;
a second active pattern spaced apart further from the substrate than the first active pattern and extending in the first direction;
a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first active pattern and the second active pattern;
a first source/drain region on a first portion of a side surface of the gate structure and electrically connected to the first active pattern;
a second source/drain region on a second portion of the side surface of the gate structure and electrically connected to the second active pattern; and
a buffer layer between at least a portion of the substrate and the first active pattern, the buffer layer comprising germanium (Ge),
wherein the substrate includes a fin pattern between the first active pattern and the buffer layer,
wherein the substrate and the fin pattern are integrated to each other,
wherein the fin pattern is a monolithic structure,
wherein the buffer layer is different from the substrate,
wherein the first source/drain region is between the fin pattern and the second source/drain region, and
wherein the buffer layer is not in contact with each of the first active pattern and the second active pattern.
2 . The semiconductor device of claim 1 , wherein a germanium concentration of the buffer layer increases as it gets closer to the first active pattern.
3 . The semiconductor device of claim 1 , wherein:
the first active pattern comprises a plurality of lower sheet patterns spaced apart from each other on the substrate, each of the lower sheet patterns extending in the first direction;
the second active pattern comprises a plurality of upper sheet patterns spaced apart from each other on the first active pattern, each of the upper sheet patterns extending in the first direction; and
a thickness of the buffer layer is greater than a thickness of each of the plurality of lower and upper sheet patterns.
4 . The semiconductor device of claim 1 , wherein the buffer layer comprises first and second buffer layers, the first and second buffer layers comprising germanium at first and second concentrations, respectively, and
wherein the second concentration of the second buffer layer is greater than the first concentration of the first buffer layer.
5 . The semiconductor device of claim 4 , wherein the buffer layer further comprises a third buffer layer between the first and second buffer layers, the third buffer layer comprising germanium at a third concentration, and
wherein the third concentration of the third buffer layer is greater than the first concentration of the first buffer layer and less than the second concentration of the second buffer layer.
6 . The semiconductor device of claim 4 , wherein the buffer layer further comprises a unit structure between the first and second buffer layers, and
wherein the unit structure comprises a first unit layer comprising germanium at a third concentration and a second unit layer comprising germanium at a fourth concentration that is greater than the third concentration.
7 . The semiconductor device of claim 6 , wherein an average germanium concentration of the unit structure is greater than the first concentration of the first buffer layer and less than the second concentration of the second buffer layer.
8 . The semiconductor device of claim 6 , wherein a thickness of each of the first and second buffer layers is greater than a thickness of each of the first and second unit layers of the unit structure.
9 . The semiconductor device of claim 1 , further comprising an insulating structure between the first source/drain region and the second source/drain region.
10 . The semiconductor device of claim 1 , wherein the first source/drain region has a first conductivity type, and
wherein the second source/drain region has a second conductivity type different from the first conductivity type.
11 . A semiconductor device comprising:
a first sheet pattern and a second sheet pattern spaced apart from each other on a substrate, each of the first and second sheet patterns extending in a first direction;
a third sheet pattern and a fourth sheet pattern spaced apart from each other on the second sheet pattern, each of the third and fourth sheet patterns extending in the first direction;
a gate structure on the substrate, the gate structure extending in a second direction crossing the first direction and penetrating the first to fourth sheet patterns, the gate structure being between ones of the first to fourth sheet patterns;
a first source/drain region on a first portion of a side surface of the gate structure and electrically connected to the first sheet pattern and the second sheet pattern;
a second source/drain region on a second portion of the side surface of the gate structure and electrically connected to the third sheet pattern and the fourth sheet pattern; and
a buffer layer between at least a portion of the substrate and the first sheet pattern, the buffer layer comprising germanium,
wherein a thickness of the buffer layer is greater than a thickness of each of the first to fourth sheet patterns,
wherein the substrate includes a fin pattern between the first sheet pattern and the buffer layer,
wherein the substrate and the fin pattern are integrated to each other,
wherein the fin pattern is a monolithic structure,
wherein the buffer layer is different from the substrate,
wherein the first source/drain region is between the fin pattern and the second source/drain region, and
wherein the buffer layer is not in contact with each of the first sheet pattern, the second sheet pattern, the third sheet pattern, and the fourth sheet pattern.
12 . The semiconductor device of claim 11 , wherein a germanium concentration of the buffer layer increases as it gets closer to the first sheet pattern.
13 . The semiconductor device of claim 11 , wherein the buffer layer comprises first and second buffer layers, the first and second buffer layers comprising germanium at first and second concentrations, respectively, and
wherein the second concentration of the second buffer layer is greater than the first concentration of the first buffer layer.
14 . The semiconductor device of claim 13 , wherein the buffer layer further comprises a third buffer layer between the first and second buffer layers, the third buffer layer comprising germanium at a third concentration, and
wherein the third concentration of the third buffer layer is greater than the first concentration of the first buffer layer and less than the second concentration of the second buffer layer.
15 . The semiconductor device of claim 13 , wherein the buffer layer further comprises a unit structure between the first and second buffer layers, and
wherein the unit structure comprises a first unit layer comprising germanium at a third concentration and a second unit layer comprising germanium at a fourth concentration that is greater than the third concentration.
16 . The semiconductor device of claim 11 , further comprising an insulating structure between the first source/drain region and the second source/drain region,
wherein the insulating structure is on a third portion of the side surface of the gate structure.
17 . A semiconductor device comprising:
a bit line on a substrate, the bit line extending in a first direction perpendicular to a top surface of the substrate;
a plurality of semiconductor patterns electrically connected to the bit line and extending in a second direction parallel to the top surface of the substrate;
a plurality of gate patterns extending in a third direction different from the first and second directions, the plurality of gate patterns alternating with the plurality of semiconductor patterns in a stacked structure;
an information storage element electrically connected to the plurality of semiconductor patterns; and
a buffer layer between at least a portion of the substrate and the plurality of semiconductor patterns and comprising germanium,
wherein the substrate includes a fin pattern between the buffer layer and the plurality of semiconductor patterns in the first direction,
wherein the substrate and the fin pattern are integrated to each other,
wherein the fin pattern is a monolithic structure,
wherein the buffer layer is different from the substrate, and
wherein the buffer layer is not in contact with the plurality of semiconductor patterns.
18 . The semiconductor device of claim 17 , wherein a germanium concentration of the buffer layer increases as it gets closer to one or more of the plurality of semiconductor patterns.
19 . The semiconductor device of claim 17 , wherein the buffer layer comprises first and second buffer layers, the first and second buffer layers comprising germanium at first and second concentrations, respectively, and a third buffer layer between the first and second buffer layers,
wherein the second concentration of the second buffer layer is greater than the first concentration of the first buffer layer, and
wherein the third buffer layer comprises germanium at a third concentration that is greater than the first concentration of the first buffer layer and less than the second concentration of the second buffer layer.
20 . The semiconductor device of claim 17 , wherein a thickness of the buffer layer is greater than a thickness of each of the plurality of semiconductor patterns.