Memory devices and methods of manufacturing thereof
A memory device includes first nanostructures stacked on top of one another; first gate stacks, where two adjacent ones of the first gate stacks wrap around a corresponding first nanostructure; second nanostructures stacked on top of one another; second gate stacks, where two adjacent ones of the second gate stacks wrap around a corresponding second nanostructure; a first drain/source feature electrically coupled to a first end of the first nanostructures; a second drain/source feature electrically coupled to both of a second end of the first nanostructures and a first end of the second nanostructures; and a third drain/source feature electrically coupled to a second end of the second nanostructures. At least one of the plurality of first gate stacks is in direct contact with at least one of the first drain/source feature or the second drain/source feature.
1 . A method for fabricating a memory device, comprising:
forming a first stack over a substrate, the first stack comprising a first nanosheet, a second nanosheet over the first nanosheet, and a third nanosheet over the second nanosheet, wherein the first nanosheet, the second nanosheet, and the third nanosheet extend along a first direction;
forming a second stack over the substrate, the second stack comprising a fourth nanosheet, a fifth nanosheet over the fourth nanosheet, and a sixth nanosheet over the fifth nanosheet, wherein the fourth nanosheet, the fifth nanosheet, and the sixth nanosheet extend along the first direction;
removing respective end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by a blocking mask during removal of the respective end portions of the fourth nanosheet and the sixth nanosheet;
forming a plurality of spacers at the respective etched end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by the blocking mask during formation of the plurality of spacers;
forming a first source/drain feature in physical contact with respective first side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet, wherein the respective first side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet are perpendicular to the first direction;
forming a second source/drain feature adjacent to the first stack and the second stack and physically contacting respective second side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet, and a first side surface of the fifth nanosheet, wherein the respective second side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet and the first side surface of the fifth nanosheet are perpendicular to the first direction; and
forming a third source/drain feature in physical contact with a second side surface of the fifth nanosheet,
wherein the first nanosheet, the third nanosheet, the fourth nanosheet, and the sixth nanosheet have first nanostructures, and
wherein the second nanosheet and the fifth nanosheet have second nanostructures, the first nanostructures being different than the second nanostructures.
2 . The method of claim 1 , wherein the first source/drain feature is epitaxially grown from the second nanosheet, and the third source/drain feature is epitaxially grown from the fifth nanosheet.
3 . The method of claim 1 , wherein the second source/drain feature includes a first portion epitaxially grown from the second nanosheet and a second portion epitaxially grown from the fifth nanosheet.
4 . The method of claim 1 , further comprising:
replacing the first nanosheet and the third nanosheet with a first gate stack to wrap around the second nanosheet; and
replacing the fourth nanosheet and the sixth nanosheet with a second gate stack to wrap around the fifth nanosheet.
5 . The method of claim 4 , wherein the first gate stack is in direct contact with the first source/drain feature and with the second source/drain feature.
6 . The method of claim 4 , wherein the second gate stack is electrically isolated from the second source/drain feature and the third source/drain feature by the plurality of spacers.
7 . The method of claim 1 , wherein the first to third source/drain features have a same conductive type.
8 . The method of claim 1 , wherein the first to sixth nanosheets extend along a same horizontal direction.
9 . A method for fabricating a memory device, comprising:
forming a first stack over a substrate, the first stack comprising a first nanosheet, a second nanosheet over the first nanosheet, and a third nanosheet over the second nanosheet, wherein the first nanosheet, the second nanosheet, and the third nanosheet extend along a first direction;
forming a second stack over the substrate, the second stack comprising a fourth nanosheet, a fifth nanosheet over the fourth nanosheet, and a sixth nanosheet over the fifth nanosheet, wherein the fourth nanosheet, the fifth nanosheet, and the sixth nanosheet extend along the first direction;
removing respective end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by a blocking mask during removal of the respective end portions of the fourth nanosheet and the sixth nanosheet;
forming a plurality of spacers at the respective etched end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by the blocking mask during formation of the plurality of spacers;
forming a first source/drain feature in physical contact with respective first side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet, wherein the respective first side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet are perpendicular to the first direction;
forming a second source/drain feature adjacent to the first stack and the second stack and physically contacting respective second side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet, and a first side surface of the fifth nanosheet; and
forming a third source/drain feature in physical contact with a second side surface of the fifth nanosheet,
wherein the first nanosheet, the third nanosheet, the fourth nanosheet, and the sixth nanosheet have first nanostructures, and
wherein the second nanosheet and the fifth nanosheet have second nanostructures, the first nanostructures being different than the second nanostructures.
10 . The method of claim 9 , wherein the first source/drain feature is epitaxially grown from the second nanosheet, and the third source/drain feature is epitaxially grown from the fifth nanosheet.
11 . The method of claim 9 , wherein the second source/drain feature includes a first portion epitaxially grown from the second nanosheet and a second portion epitaxially grown from the fifth nanosheet.
12 . The method of claim 9 , further comprising:
replacing the first nanosheet and the third nanosheet with a first gate stack to wrap around the second nanosheet; and
replacing the fourth nanosheet and the sixth nanosheet with a second gate stack to wrap around the fifth nanosheet.
13 . The method of claim 12 , wherein the first gate stack is in direct contact with the first source/drain feature and with the second source/drain feature.
14 . The method of claim 12 , wherein the second gate stack is electrically isolated from the second source/drain feature and the third source/drain feature by the plurality of spacers.
15 . The method of claim 9 , wherein the first to third source/drain features have a same conductive type.
16 . The method of claim 9 , wherein the first to sixth nanosheets extend along a same horizontal direction.
17 . A method for fabricating a memory device, comprising:
forming a first stack over a substrate, the first stack comprising a first nanosheet, a second nanosheet over the first nanosheet, and a third nanosheet over the second nanosheet, wherein the first nanosheet, the second nanosheet, and the third nanosheet extend along a first direction;
forming a second stack over the substrate, the second stack comprising a fourth nanosheet, a fifth nanosheet over the fourth nanosheet, and a sixth nanosheet over the fifth nanosheet, wherein the fourth nanosheet, the fifth nanosheet, and the sixth nanosheet extend along the first direction;
removing respective end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by a blocking mask during removal of the respective end portions of the fourth nanosheet and the sixth nanosheet; and
forming a plurality of spacers at the respective etched end portions of the fourth nanosheet and the sixth nanosheet wherein the first stack is covered by the blocking mask during formation of the plurality of spacers;
forming a first source/drain feature in physical contact with respective first side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet;
forming a second source/drain feature adjacent to the first stack and the second stack and physically contacting respective second side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet, and a first side surface of the fifth nanosheet, wherein the respective second side surfaces of the first nanosheet, the second nanosheet, and the third nanosheet and the first side surface of the fifth nanosheet are perpendicular to the first direction; and
forming a third source/drain feature in physical contact with a second side surface of the fifth nanosheet,
wherein the first nanosheet, the third nanosheet, the fourth nanosheet, and the sixth nanosheet have first nanostructures, and
wherein the second nanosheet and the fifth nanosheet have second nanostructures, the first nanostructures being different than the second nanostructures.
18 . The method of claim 17 , wherein the first to third source/drain features have a same conductive type.