IP Library Granted Patent US 12672339
Granted Patent B2
US 12672339 · App. 18/567,023 · Granted Jun 30, 2026

Silicon carbide semiconductor device and power conversion device using silicon carbide semiconductor device

Inventors: Shiro Hino (Tokyo, JP); Kotaro Kawahara (Tokyo, JP)
Assignee: MITSUBISHI ELECTRIC CORPORATION
H10D84/146H10D62/126H10D62/8325H10D64/62
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Quick Facts
Patent No.
US 12672339
App. No.
18/567,023
Granted
Jun 30, 2026
Kind
B2
Abstract

A silicon carbide semiconductor device according to the present disclosure includes: an n-type drift layer on an n-type semiconductor substrate; p-type well regions in a surface layer of the drift layer; an n-type first separation region between the well regions; an n-type second separation region; an n-type source region in each of the well regions; a p-type contact region; an n-type current diffusion region in a surface layer of each of the well regions; a gate insulating film; a gate electrode; an ohmic electrode; a Schottky electrode on the first separation region.

Claims (33)

1 . A silicon carbide semiconductor device, comprising:

a drift layer of a first conductivity type of a silicon carbide semiconductor formed on a first main surface of a semiconductor substrate of the first conductivity type;

well regions of a second conductivity type formed separately in a cross-sectional lateral direction in a surface layer of the drift layer and including a first separation region of the first conductivity type therebetween;

a second separation region of the first conductivity type formed in a region where the first separation region is not formed between the well regions;

a source region of the first conductivity type formed in an inner part of a surface layer of a semiconductor in a cross-sectional lateral direction in each of the well regions;

a contact region of the second conductivity type formed on a side closer to the first separation region in relation to the source region in the inner part of the surface layer of the semiconductor in the cross-sectional lateral direction in each of the well regions;

a current diffusion region of the first conductivity type formed in a surface layer part of each of the well regions between the contact region and the first separation region;

a gate insulating film formed on the second separation region and each of the well regions adjacent to the second separation region;

a gate electrode formed on the gate insulating film;

an ohmic electrode formed on the contact region;

a Schottky electrode formed on the first separation region to be Schottky-connected to the first separation region;

a source electrode formed on the ohmic electrode and the Schottky electrode; and

a drain electrode formed on a second main surface of the semiconductor substrate located on a side opposite to the first main surface.

2 . The silicon carbide semiconductor device according to claim 1 , further comprising

a channel current diffusion region of the first conductivity type in the surface layer part of each of the well regions between the source region and the second separation region.

3 . The silicon carbide semiconductor device according to claim 1 , wherein

a first conductivity type impurity concentration of the current diffusion region is higher than a first conductivity type impurity concentration of the first separation region.

4 . The silicon carbide semiconductor device according to claim 1 , wherein

a first conductivity type impurity concentration of the current diffusion region is lower than a first conductivity type impurity concentration of the source region.

5 . The silicon carbide semiconductor device according to claim 1 , wherein

a first conductivity type impurity concentration of the current diffusion region is lower than a second conductivity type impurity concentration of each of the well regions.

6 . The silicon carbide semiconductor device according to claim 1 , wherein

the current diffusion region has contact with the contact region.

7 . The silicon carbide semiconductor device according to claim 1 , wherein

the first conductivity type impurity concentration of the current diffusion region is 1×10 16 cm −3 or higher and 1×10 19 cm −3 or lower.

8 . The silicon carbide semiconductor device according to claim 1 , wherein

a thickness of the current diffusion region is equal to or larger than 10 nm and equal to or smaller than 200 nm.

9 . A power conversion device, comprising:

a main conversion circuit including the silicon carbide semiconductor device according to claim 1 and configured to convert and output electrical power which has been input;

a drive circuit configured to

make a voltage of the gate electrode of the silicon carbide semiconductor device coincide with a voltage of the source electrode, thereby making the silicon carbide semiconductor device perform an off operation, and

output a drive signal for driving the silicon carbide semiconductor device to the silicon carbide semiconductor device; and

a control circuit configured to output a control signal for controlling the drive circuit to the drive circuit.