IP Library Granted Patent US 12672340
Granted Patent B2
US 12672340 · App. 18/078,064 · Granted Jun 30, 2026

Capacitor on fin structure and fabricating method of the same

Inventors: Hsin-Yu Chen (Nantou County, TW); Chun-Hao Lin (Kaohsiung City, TW); Yuan-Ting Chuang (Yilan County, TW); Shou-Wei Hsieh (Hsinchu City, TW)
Assignee: UNITED MICROELECTRONICS CORP.
H10D84/811H10D1/042H10D1/696H10D1/714H10D1/716H10D84/0149H10D84/038
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Quick Facts
Patent No.
US 12672340
App. No.
18/078,064
Granted
Jun 30, 2026
Kind
B2
Abstract

A capacitor on a fin structure includes a fin structure. A dielectric layer covers the fin structure. A first electrode extension is embedded within the fin structure. A first electrode penetrates the dielectric layer and contacts the first electrode extension. A second electrode and a capacitor dielectric layer are disposed within the dielectric layer. The capacitor dielectric layer surrounds the second electrode, and the capacitor dielectric layer is between the second electrode and the first electrode extension.

Claims (16)

1 . A capacitor on a fin structure, comprising:

a fin structure;

two gates disposed on the fin structure;

a dielectric layer covering the fin structure;

a capacitor disposed on the fin structure and between the two gates, wherein the capacitor comprises:

a first electrode extension embedded within the fin structure;

a first electrode penetrating the dielectric layer and contacting the first electrode extension;

a second electrode disposed within the dielectric layer;

a capacitor dielectric layer disposed within the dielectric layer and the capacitor dielectric layer surrounding the second electrode, wherein the capacitor dielectric layer is between the second electrode and the first electrode extension.

2 . The capacitor on a fin structure of claim 1 , wherein the first electrode extension comprises a doped region or an epitaxial layer.

3 . The capacitor on a fin structure of claim 1 , wherein the first electrode comprises a metal layer and a barrier.

4 . The capacitor on a fin structure of claim 1 , further comprising a plurality of the first electrodes disposed within the dielectric layer, wherein each of the plurality of the first electrodes penetrates the dielectric layer and contacts the first electrode extension, and each of the plurality of the first electrodes does not contact each other.

5 . The capacitor on a fin structure of claim 1 , further comprising a plurality of the second electrodes and a plurality of the capacitor dielectric layers disposed within the dielectric layer, wherein each of the plurality of the second electrodes is surrounded by one of the plurality of the capacitor dielectric layers.

6 . The capacitor on a fin structure of claim 1 , wherein a first direction is parallel to a top surface of the fin structure, along the first direction, there is no gate between the first electrode and the second electrode.

7 . The capacitor on a fin structure of claim 1 , wherein the capacitor dielectric layer physically contacts the first electrode extension.

8 . The capacitor on a fin structure of claim 1 , further comprising two spacers respectively disposed at two sides of one of the gates, wherein the first electrode extension overlaps one of the two spacers.