Device, method and system to provide an interconnect between channel structures

1 . An integrated circuit (IC) comprising:

a separation layer;

a first source or drain (SD) structure and a second SD structure;

a first channel stack structure at a first surface of the separation layer, the first channel stack structure comprising first channel structures which each extend in parallel with a first horizontal line to each of the first SD structure and the second SD structure;

a third SD structure and a fourth SD structure;

a second channel stack structure at a second surface of the separation layer, the second channel stack structure comprising second channel structures which each extend in parallel with the first horizontal line to each of the third SD structure and the fourth SD structure;

a first gate structure, wherein the first channel stack structure extends through the first gate structure;

a second gate structure, wherein the second channel stack structure extends through the second gate structure; and

an interconnect structure comprising:

a via portion which extends into the separation layer; and

a trace portion within the separation layer, and between the first channel stack structure and the second channel stack structure;

wherein:

the first SD structure and the second SD structure are at opposite respective ends of a first horizontal span of the first channel stack structure;

the third SD structure and the fourth SD structure are at opposite respective ends of a second horizontal span of the second channel stack structure;

the first horizontal span and the second horizontal span are each in parallel with the first horizontal line;

in the separation layer, the trace portion extends in parallel with a second horizontal line across each of:

an entirety of a third horizontal span of the first channel stack structure and the first gate structure; and

an entirety of a fourth horizontal span of the second channel stack structure and the second gate structure; and

the second horizontal line is orthogonal to the first horizontal line.

2 . The IC of claim 1 , wherein:

the interconnect structure comprises a contiguous body of a conductive material, wherein the contiguous body extends to form respective parts of the trace portion and the via portion;

in a region where the trace portion meets the via portion, a liner structure extends around the contiguous body.

3 . The IC of claim 2 , wherein, in the trace portion, the contiguous body forms one of a seam structure or a void structure.

4 . The IC of claim 2 , wherein:

the via portion is a first via portion which extends into the separation layer at the first surface;

the interconnect structure further comprises a second via portion which extends into the separation layer at either of the first surface or the second surface; and

the trace portion extends across the third horizontal span and the fourth horizontal span to each one of the first via portion of the second via portion.

5 . The IC of claim 4 , wherein:

the contiguous body further extends to form a respective part of the second via portion; and

in another region where the trace portion meets the second via portion, the liner structure extends around the contiguous body.

6 . The IC of claim 4 , wherein:

the contiguous body is a first contiguous body, the conductive material is a first conductive material, and the liner structure is a first liner structure;

the second via portion comprises a second contiguous body of a second conductive material;

a second liner structure extends around the second contiguous body; and

one of the first liner structure or the second liner structure extends between the first contiguous body and the second contiguous body.

7 . The IC of claim 1 , wherein the first channel structures are arranged along a direction which is perpendicular to the first surface.

8 . The IC of claim 1 , wherein:

the via portion is a first via portion which extends into the separation layer at the first surface;

the interconnect structure further comprises a second via portion which extends into the separation layer at either of the first surface or the second surface; and

the trace portion extends across the third horizontal span and the fourth horizontal span to each one of the first via portion of the second via portion.

9 . The IC of claim 1 , wherein:

the separation layer comprises a first contiguous body of an insulation material;

the first contiguous body extends over a top of the trace portion in a region under the first channel stack structure; and

the first contiguous body further extends under a bottom of the trace portion in a region over the second channel stack structure.

10 . The IC of claim 1 , wherein the first channel structures comprise nanowires or nanoribbons.

11 . A system comprising:

a substrate;

a power supply; and

an integrated circuit (IC) die attached to the substrate and coupled to the power supply, the IC die comprising:

a separation layer;

a first source or drain (SD) structure and a second SD structure;

a first channel stack structure at a first surface of the separation layer, the first channel stack structure comprising first channel structures which each extend in parallel with a first horizontal line to each of the first SD structure and the second SD structure;

a third SD structure and a fourth SD structure;

a second channel stack structure at a second surface of the separation layer, the second channel stack structure comprising second channel structures which each extend in parallel with the first horizontal line to each of the third SD structure and the fourth SD structure;

a first gate structure, wherein the first channel stack structure extends through the first gate structure;

a second gate structure, wherein the second channel stack structure extends through the second gate structure; and

an interconnect structure comprising:

a via portion which extends into the separation layer; and

a trace portion within the separation layer, and between the first channel stack structure and the second channel stack structure;

wherein:

the first SD structure and the second SD structure are at opposite respective ends of a first horizontal span of the first channel stack structure;

the third SD structure and the fourth SD structure are at opposite respective ends of a second horizontal span of the second channel stack structure;

the first horizontal span and the second horizontal span are each in parallel with the first horizontal line;

in the separation layer, the trace portion extends in parallel with a second horizontal line across each of:

an entirety of a third horizontal span of the first channel stack structure and the first gate structure; and

an entirety of a fourth horizontal span of the second channel stack structure and the second gate structure; and

the second horizontal line is orthogonal to the first horizontal line.

12 . The system of claim 11 , wherein:

the interconnect structure comprises a contiguous body of a conductive material, wherein the contiguous body extends to form respective parts of the trace portion and the via portion;

in a region where the trace portion meets the via portion, a liner structure extends around the contiguous body.

13 . The system of claim 12 , wherein, in the trace portion, the contiguous body forms one of a seam structure or a void structure.

14 . The system of claim 11 , wherein:

the via portion is a first via portion which extends into the separation layer at the first surface;

the interconnect structure further comprises a second via portion which extends into the separation layer at either of the first surface or the second surface; and

the trace portion extends across the third horizontal span and the fourth horizontal span to each one of the first via portion of the second via portion.

15 . The system of claim 11 , wherein the system comprises, or is thermally coupled to, a cooling structure, the cooling structure operable to remove heat from an IC die to achieve an operating temperature at or below −25° C.