Semiconductor device and method for forming the same
View Patent ↗A semiconductor device includes a semiconductor layer, a deep trench isolation structure, a shallow trench isolation structure, a first resistance layer, a second resistance layer, a first heavily doped region, a second heavily doped region, and a conductive line. The deep trench isolation structure separates the semiconductor device into a plurality of units including the first and second units. The shallow trench isolation structure is disposed on a portion of the semiconductor layer in one of the plurality of units. The first and second resistance layers are disposed on the shallow trench isolation structure in the first and second units respectively. The first and second heavily doped regions are embedded in the shallow trench isolation structure and in physical contact with the semiconductor layer in the first and second units respectively. The conductive line electrically connects the first and second resistance layers and the second heavily doped region.
1 . A semiconductor device, comprising:
a semiconductor layer;
a deep trench isolation structure separating the semiconductor device into a plurality of units, wherein the plurality of units comprises a first unit and a second unit;
a shallow trench isolation structure disposed on a portion of the semiconductor layer in one of the plurality of units;
a first resistance layer and a second resistance layer disposed on the shallow trench isolation structure in the first unit and the second unit respectively;
a first heavily doped region and a second heavily doped region embedded in the shallow trench isolation structure and in physical contact with the semiconductor layer in the first unit and the second unit respectively; and
a conductive line electrically connecting the first resistance layer, the second resistance layer, and the second heavily doped region,
wherein the semiconductor device further comprises an insulating layer covering a bottom surface of the semiconductor layer, and the deep trench isolation structure extends from a top surface of the shallow trench isolation structure to a top surface of the insulating layer.
2 . The semiconductor device as claimed in claim 1 , wherein the deep trench isolation structure penetrates through the shallow trench isolation structure between each of the units.
3 . The semiconductor device as claimed in claim 1 , wherein the deep trench isolation structure laterally surrounds portions of the semiconductor layer in each of the units, and the semiconductor layer is electrically isolated between each of the units.
4 . The semiconductor device as claimed in claim 1 , wherein the shallow trench isolation structure is discontinuous between each of the units.
5 . The semiconductor device as claimed in claim 1 , further comprising another conductive line electrically connecting the first resistance layer and the first heavily doped region.
6 . The semiconductor device as claimed in claim 1 , wherein the first resistance layer and the second resistance layer are horizontally spaced apart from edges of the first unit and the second unit respectively.
7 . The semiconductor device as claimed in claim 1 , wherein the first heavily doped region, the second heavily doped region, and the semiconductor layer have the same conductivity type.
8 . The semiconductor device as claimed in claim 1 , wherein thicknesses of the first heavily doped region and the second heavily doped region are smaller than a thickness of the shallow trench isolation structure.
9 . The semiconductor device as claimed in claim 1 , wherein the shallow trench isolation structure and the deep trench isolation structure comprise different materials.
10 . The semiconductor device as claimed in claim 1 , wherein the plurality of units further comprises a third unit, and the third unit comprises:
a third resistance layer disposed on the shallow trench isolation structure; and
a third heavily doped region embedded in the shallow trench isolation structure and in physical contact with the semiconductor layer;
wherein the semiconductor device further comprises another conductive line electrically connecting the second resistance layer, the third resistance layer, and the third heavily doped region.
11 . A method for forming the semiconductor device as claimed in claim 1 , comprising:
forming a shallow trench isolation structure on a semiconductor layer;
forming a first resistance layer and a second resistance layer on the shallow trench isolation structure;
embedding a first heavily doped region and a second heavily doped region into the shallow trench isolation structure, wherein the first heavily doped region and the second heavily doped region are in physical contact with the semiconductor layer;
forming a deep trench isolation structure separating the semiconductor device into a plurality of units comprising a first unit and a second unit, wherein the first resistance layer and the first heavily doped region are in the first unit, and the second resistance layer and the second heavily doped region are in the second unit; and
forming a conductive line electrically connecting the first resistance layer, the second resistance layer, and the second heavily doped region.
12 . The method for forming the semiconductor device as claimed in claim 11 , wherein before embedding the first heavily doped region and the second heavily doped region into the shallow trench isolation structure, the semiconductor layer has a first protruding portion and a second protruding portion in the shallow trench isolation structure.
13 . The method for forming the semiconductor device as claimed in claim 12 , wherein forming the first heavily doped region and the second heavily doped region comprises implanting a dopant into the first protruding portion and the second protruding portion.
14 . The method for forming the semiconductor device as claimed in claim 13 , wherein the dopant has the same conductivity type as the semiconductor layer.
15 . The method for forming the semiconductor device as claimed in claim 11 , wherein forming the first heavily doped region and the second heavily doped region comprises:
forming a first through hole and a second through hole exposing the semiconductor layer in the shallow trench isolation structure; and
filling the first through hole and the second through hole with a semiconductor material.
16 . The method for forming the semiconductor device as claimed in claim 11 , wherein forming the deep trench isolation structure comprises:
forming a deep trench penetrating through the shallow trench isolation structure and the semiconductor layer; and
filling the deep trench with an insulating material.
17 . The method for forming the semiconductor device as claimed in claim 11 , further comprising forming another conductive line electrically connecting the first resistance layer and the first heavily doped region.