IP Library Granted Patent US 12672367
Granted Patent B2
US 12672367 · App. 18/368,820 · Granted Jun 30, 2026

Solid-state imaging device and electronic device

Inventor: Hideo Kido (Kanagawa, JP)
Assignee: Sony Group Corporation
H10F39/1865H04N23/75H04N25/57H04N25/622H04N25/76H10F39/18H10F39/80373
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Quick Facts
Patent No.
US 12672367
App. No.
18/368,820
Granted
Jun 30, 2026
Kind
B2
Abstract

The present technology relates to a solid-state imaging device and an electronic device capable of improving a saturation characteristic. A photo diode is formed on a substrate, and a floating diffusion accumulates a signal charge read from the photo diode. A plurality of vertical gate electrodes is formed from a surface of the substrate in a depth direction in a region between the photo diode and the floating diffusion, and an overflow path is formed in a region interposed between a plurality of vertical gate electrodes. The present technology may be applied to a CMOS image sensor.

Claims (41)

1 . A light detecting device, comprising:

a substrate;

a photoelectric conversion region;

a floating diffusion;

a first vertical gate electrode;

a second vertical gate electrode, wherein the floating diffusion accumulates a signal charge transferred from the photoelectric conversion region through the first vertical gate electrode and the second vertical gate electrode;

a first semiconductor region including a first portion and a second portion; and

a second semiconductor region disposed between the first vertical gate electrode and the second vertical gate electrode, wherein:

the first vertical gate electrode is disposed between the first portion of the first semiconductor region and the second semiconductor region;

the second vertical gate electrode is disposed between the second semiconductor region and the second portion of the first semiconductor region; and

at a first distance from a surface of the substrate in a depth direction, a potential of a first portion of the second semiconductor region is lower than a potential of the first portion of the first semiconductor region and a potential of the second portion of the first semiconductor region.

2 . The light detecting device according to claim 1 , further comprising a driving circuit configured to apply a voltage to the first vertical gate electrode and the second vertical gate electrode while a charge is generated and accumulated in the photoelectric conversion region.

3 . The light detecting device according to claim 2 , wherein the voltage is negative and the charge is an electron.

4 . The light detecting device according to claim 2 , wherein the driving circuit is configured to apply the voltage to the first vertical gate electrode and the second vertical gate electrode.

5 . The light detecting device according to claim 2 , wherein each of the first vertical gate electrode and the second vertical gate electrode are configured to receive the voltage simultaneously.

6 . The light detecting device according to claim 2 , wherein a pole of the voltage is the same as a pole of the charge.

7 . The light detecting device according to claim 1 , wherein the first vertical gate electrode and the second vertical gate electrode are configured to transfer a charge from the photoelectric conversion region to the first semiconductor region.

8 . The light detecting device according to claim 1 , wherein the second semiconductor region is configured to serve as a transfer path to the first semiconductor region for a surplus charge.

9 . The light detecting device according to claim 1 , further comprising a control circuit configured to output control signals to synchronize application of a voltage to the first vertical electrode and the second vertical electrode to thereby modulate a potential of an overflow barrier between the first vertical electrode and the second vertical electrode.

10 . The light detecting device according to claim 9 , wherein the control circuit is further configured to apply the voltage to the first vertical gate electrode and the second electrode while a charge is generated and accumulated in the photoelectric conversion region.

11 . The light detecting device according to claim 9 , wherein the voltage is a first negative voltage, and wherein the control circuit is further configured to apply a second negative voltage having a greater magnitude than the first negative voltage to the first vertical electrode and the second vertical electrode at a timing corresponding to closure of a mechanical shutter covering a photoelectric conversion region.

12 . The light detecting device according to claim 9 , wherein the control circuit is further configured to output the control signals to synchronize application of the voltage to the first vertical electrode and the second vertical electrodes with a vertical synchronization signal, a global shutter driving signal, and a mechanical shutter vertical synchronization signal to modulate the potential of the overflow barrier.

13 . An imaging device comprising:

a light detecting device comprising:

a substrate;

a photoelectric conversion region;

a floating diffusion;

a first vertical gate electrode;

a second vertical gate electrode, wherein the floating diffusion accumulates a signal charge transferred from the photoelectric conversion region through the first vertical gate electrode and the second vertical gate electrode;

a first semiconductor region including a first portion and a second portion;

a second semiconductor region disposed between the first vertical gate electrode and the second vertical gate electrode, wherein:

the first vertical gate electrode is disposed between the first portion of the first semiconductor region and the second semiconductor region;

the second vertical gate electrode is disposed between the second semiconductor region and the second portion of the first semiconductor region; and

at a first distance from a surface of the substrate in a depth direction, a potential of a first portion of the second semiconductor region is lower than a potential of the first portion of the first semiconductor region and a potential of the second portion of the first semiconductor region.

14 . The imaging device according to claim 13 , further comprising a driving circuit configured to apply a voltage to the first vertical gate electrode and the second vertical gate electrode while a charge is generated and accumulated in the photoelectric conversion region.

15 . The imaging device according to claim 14 , wherein the driving circuit is configured to apply the voltage to the first vertical gate electrode and the second vertical gate electrode.

16 . The imaging device according to claim 15 , wherein each of the first vertical gate electrode and the second vertical gate electrode are configured to receive the voltage simultaneously.

17 . The imaging device according to claim 13 , further comprising a control circuit configured to output control signals to synchronize application of a voltage to the first vertical electrode and the second vertical electrode to thereby modulate a potential of an overflow barrier between the first vertical electrode and the second vertical electrode.

18 . The imaging device according to claim 17 , wherein the control circuit is further configured to apply the voltage to the first vertical gate electrode and the second electrode while a charge is generated and accumulated in the photoelectric conversion region.

19 . The imaging device according to claim 17 , wherein the voltage is a first negative voltage, and wherein the control circuit is further configured to apply a second negative voltage having a greater magnitude than the first negative voltage to the first vertical electrode and the second vertical electrode at a timing corresponding to closure of a mechanical shutter covering a photoelectric conversion region.

20 . The imaging device according to claim 17 , wherein the control circuit is further configured to output the control signals to synchronize application of the voltage to the first vertical electrode and the second vertical electrodes with a vertical synchronization signal, a global shutter driving signal, and a mechanical shutter vertical synchronization signal to modulate the potential of the overflow barrier.