Display substrate and display apparatus

1 . A display substrate, comprising a first display region, wherein the first display region comprises a plurality of display island regions spaced apart from each other, a light-transmissive region between adjacent display island regions, and a connection region connecting adjacent display island regions;

a display island region comprises a first pixel unit arranged on a base, wherein the first pixel unit comprises a first region pixel circuit and a first region light emitting element electrically connected with the first region pixel circuit; an orthographic projection of the first region pixel circuit on the base overlaps with an orthographic projection of the first region light emitting element electrically connected with the first region pixel circuit on the base;

and the display island region has an arc edge;

wherein the display island region further comprises a plurality of data lines; the first region pixel circuit is electrically connected with a data line, and an orthographic projection of the first region pixel circuit on the base overlaps with orthographic projections of two data lines on the base;

at least one of the plurality of data lines surrounds out sides of all first region pixel circuits of the first pixel unit.

2 . The display substrate according to claim 1 , wherein the display island region is circular or oval.

3 . The display substrate according to claim 1 , wherein edges of the light-transmissive region comprise: a first edge contacting the connection region, and a second edge contacting the display island region; first edges and second edges are connected in an interleaved mode, and the second edge is arc-shaped.

4 . The display substrate according to claim 3 , wherein the light-transmissive region is octagonal.

5 . The display substrate according to claim 1 , wherein the display island region comprises a first pixel unit, the first pixel unit comprises three first region light emitting elements; the three first region light emitting elements comprise a first light emitting element emitting light of a first color, a second light emitting element emitting light of a second color, and a third light emitting element emitting light of a third color.

6 . The display substrate according to claim 5 , wherein light emitting regions of the first light emitting element, the second light emitting element, and the third light emitting element as a whole are formed as a circular or oval shape.

7 . The display substrate according to claim 5 , wherein the first pixel unit further comprises three first region pixel circuits, the three first region pixel circuits and the three first region light emitting elements are electrically connected in a one-to-one correspondence;

the three first region pixel circuits are sequentially arranged along a first direction; the first light emitting element and the second light emitting element are sequentially arranged in a second direction, and the third light emitting element is located on a same side of the first light emitting element and the second light emitting element in the first direction; wherein the first direction intersects the second direction.

8 . The display substrate according to claim 1 , wherein the first pixel unit comprises three first region pixel circuits; the three first region pixel circuits comprise a first pixel circuit, a second pixel circuit and a third pixel circuit arranged in sequence along a first direction;

the display island region comprises a first data line to a twelfth data line arranged in sequence along the first direction;

the first to third data lines are located on a side of the three first region pixel circuits in the first direction, and the tenth to twelfth data lines are located on the other side of the three first region pixel circuits in the first direction;

the first pixel circuit is electrically connected with the fourth data line, and an orthographic projection of the first pixel circuit on the base overlaps with orthographic projections of the fourth data line and the fifth data line on the base;

the second pixel circuit is electrically connected with the sixth data line, and an orthographic projection of the second pixel circuit on the base overlaps with orthographic projections of the sixth data line and the seventh data line on the base; and

the third pixel circuit is electrically connected to the eighth data line, and an orthographic projection of the third pixel circuit on the base overlaps with orthographic projections of the eighth data line and the ninth data line on the base.

9 . The display substrate according to claim 8 , wherein the first data line to the third data line, and the tenth data line to the twelfth data line are all arc-shaped wirings that bend towards a direction away from the first region pixel circuit in the first direction, wherein a bending direction of the first data line to the third data line is different from a bending direction of the tenth data line to the twelfth data line; and/or

the first data line to the third data line and the tenth data line to the twelfth data line are of a same layer structure and are located on a side of the fourth data line to the ninth data line away from the base.

10 . The display substrate according to claim 1 , wherein the first region pixel circuit comprises: at least one first-type transistor, at least one second-type transistor, and a storage capacitor, and a transistor type of the first-type transistor is different from that of the second-type transistor.

11 . The display substrate according to claim 10 , wherein in a direction perpendicular to the display substrate, the first display region at least comprises: a base, and a first semiconductor layer, a second conductive layer, a second semiconductor layer, a third conductive layer, a fourth conductive layer, a fifth conductive layer and a sixth conductive layer that are disposed on the base;

the first semiconductor layer at least comprises an active layer of the first-type transistor of the first region pixel circuit;

the second conductive layer at least comprises: a gate of the first-type transistor of the first region pixel circuit;

the second semiconductor layer at least comprises an active layer of the second-type transistor of the first region pixel circuit;

the third conductive layer at least comprises a gate of the second-type transistor of the first region pixel circuit;

the fourth conductive layer at least comprises: a plurality of scan signal lines electrically connected to the first region pixel circuit;

the fifth conductive layer at least comprises a plurality of data lines electrically connected or overlapped with the first region pixel circuit; and

the sixth conductive layer at least comprises a plurality of data lines located on periphery of the first region pixel circuit.

12 . The display substrate according to claim 11 , wherein the first semiconductor layer, the second conductive layer, the second semiconductor layer, the third conductive layer, the fourth conductive layer, the fifth conductive layer and the sixth conductive layer are sequentially arranged on the base.

13 . The display substrate according to claim 11 , wherein the sixth conductive layer of the display island region further comprises: a power supply transmission line for transmitting a first voltage signal, a power supply transmission line for transmitting a second voltage signal, an initial transmission line for transmitting a first initial signal, and an initial transmission line for transmitting a second initial signal.

14 . The display substrate according to claim 1 , further comprising: a second display region located on at least one side of the first display region; the second display region comprises a plurality of second pixel units disposed on the base, a second pixel unit of the plurality of second pixel units comprises a second region pixel circuit and a second region light emitting element electrically connected with the second region pixel circuit; an orthographic projection of the second region pixel circuit on the base overlaps with an orthographic projection of the second region light emitting element electrically connected with the second region pixel circuit on the base;

wherein, a density of first pixel units in the first display region is lower than a density of the plurality of second pixel units in the second display region.

15 . The display substrate according to claim 14 , wherein two rows of second pixel units of the second display region correspond to one row of first pixel units of the first display region, and two columns of second pixel units of the second display region correspond to one column of first pixel units of the first display region.

16 . The display substrate according to claim 14 , wherein the second display region further comprises a plurality of data lines, a second region pixel circuit in a 2n-th row and a j-th column is connected to a different data line from a second region pixel circuit in a (2n−1)-th row and a j-th column, wherein both n and j are integers.

17 . The display substrate according to claim 1 , wherein the display island region further comprises: a pixel define layer, and a black matrix located on a side of the pixel define layer away from the base;

the pixel define layer has a pixel opening that exposes a portion of an anode of the first region light emitting element; the black matrix has a matrix opening; an orthographic projection of the matrix opening on the base covers an orthographic projection of the pixel opening on the base, and an orthographic projection of the anode of the first region light emitting element on the base covers the orthographic projection of the matrix opening on the base.

18 . The display substrate according to claim 17 , wherein the black matrix covers the connection region.

19 . A display apparatus, comprising: the display substrate according to claim 1 , and a sensor located on a non-display side of the display substrate, and an orthographic projection of the sensor on the display substrate overlaps with the first display region of the display substrate.

20 . The display substrate according to claim 8 , wherein the first data line to the third data line and the tenth data line to the twelfth data line are of a same layer structure and are located on a side of the fourth data line to the ninth data line away from the base.