Method of inspecting display panel and manufacturing method of display panel

1 . A method of inspecting a display panel, the method comprising:

testing a pixel circuit including a plurality of transistors and a capacitor in the display panel, and

wherein the testing of the pixel circuit includes:

providing a first test voltage to a first node to which a first electrode of the capacitor is directly connected;

providing a second test voltage different from the first test voltage to a second node to which a second electrode of the capacitor is directly connected; and

detecting a defect in the pixel circuit through a test transistor directly connected to the first node among the plurality of transistors,

wherein the plurality of transistors includes:

a first transistor including a first electrode, a second electrode directly connected to the second node, and a gate electrode directly connected to the first node.

2 . The method of claim 1 , wherein the plurality of transistors further includes:

a second transistor connected between the first node and a data line;

a third transistor connected to the first node and a first test voltage line;

a fourth transistor connected to the second node and a second test voltage line; and

a fifth transistor connected to the first electrode of the first transistor and a third test voltage line, and

wherein the test transistor is the second transistor.

3 . The method of claim 2 , wherein the providing of the first test voltage includes:

turning on the third transistor; and

transferring the first test voltage provided through the first test voltage line to the first node through the third transistor.

4 . The method of claim 3 , wherein the providing of the second test voltage includes:

turning on the fourth transistor; and

transferring the second test voltage provided through the second test voltage line to the second node through the fourth transistor.

5 . The method of claim 4 , further comprising:

providing a third test voltage different from the first and second test voltages to the second node, and

wherein the providing of the third test voltage includes:

turning on the fifth transistor; and

transferring the third test voltage provided through the third test voltage line to the second node through the fifth transistor and the first transistor.

6 . The method of claim 5 , wherein a level of the third test voltage is greater than each of a level of the first test voltage and a level of the second test voltage.

7 . The method of claim 5 , wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a voltage of the first node through the second transistor and the data line.

8 . The method of claim 7 , wherein, after the third transistor is turned on, the fourth transistor is turned on,

after the fourth transistor is turned off, the third transistor is turned off,

after both the third transistor and the fourth transistor are turned off, the fifth transistor is turned on, and

while the fifth transistor is turned on, the second transistor is turned on and then turned off.

9 . The method of claim 4 , wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a current flowing through the third transistor and the second transistor.

10 . The method of claim 9 , wherein, after the third transistor is turned on, the fourth transistor is turned on,

after the fourth transistor is turned on, the second transistor is turned on,

after the second transistor is turned off, the fourth transistor is turned off, and

after the fourth transistor is turned off, the third transistor is turned off.

11 . The method of claim 3 , wherein the providing of the second test voltage includes:

turning on the fifth transistor; and

transferring the second test voltage provided through the third test voltage line to the second node through the fifth transistor and the first transistor.

12 . The method of claim 11 , further comprising:

providing a third test voltage different from the first and second test voltages to the second node, and

wherein the providing of the third test voltage includes:

turning on the fourth transistor; and

transferring the third test voltage provided through the second test voltage line to the second node through the fourth transistor.

13 . The method of claim 12 , wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a voltage of the first node through the second transistor and the data line.

14 . The method of claim 13 , wherein, after the third transistor is turned on, the fifth transistor is turned on,

after the fifth transistor is turned off, the third transistor is turned off,

after both the third transistor and the fifth transistor are turned off, the fourth transistor is turned on, and

while the fourth transistor is turned on, the second transistor is turned on and then turned off.

15 . The method of claim 1 , wherein the first test voltage is a positive voltage, and the second test voltage is a negative voltage.

16 . The method of claim 15 , wherein an absolute value of the first test voltage is the same as an absolute value of the second test voltage.

17 . A method of manufacturing a display panel, the method comprising:

forming a pixel circuit including a plurality of transistors and a capacitor in the display panel;

testing the pixel circuit; and

forming a light emitting element electrically connected with the pixel circuit,

wherein the plurality of transistors includes:

a first transistor including a gate electrode connected to a first node, a first electrode, a second electrode connected to a second node;

a second transistor connected between the first node and a data line;

a third transistor connected to the first node and a first test voltage line;

a fourth transistor connected to the second node and a second test voltage line; and

a fifth transistor connected to the first electrode of the first transistor and a third test voltage line,

wherein the capacitor includes a first electrode connected to the first node and a second electrode connected to the second node, and

wherein the testing of the pixel circuit includes:

providing a first test voltage to the first node;

providing a second test voltage different from the first test voltage to the second node; and

detecting a defect in the pixel circuit through the second transistor.

18 . The method of claim 17 , wherein the testing of the pixel circuit further includes providing a third test voltage different from the first and second test voltages to the second node,

wherein the providing of the first test voltage includes:

turning on the third transistor; and

transferring the first test voltage provided through the first test voltage line to the first node through the third transistor,

wherein the providing of the second test voltage includes:

turning on the fourth transistor; and

transferring the second test voltage provided through the second test voltage line to the second node through the fourth transistor,

wherein the providing of the third test voltage includes:

turning on the fifth transistor; and

transferring the third test voltage provided through the third test voltage line to the second node through the fifth transistor and the first transistor, and

wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a voltage of the first node through the second transistor and the data line.

19 . The method of claim 17 , wherein the testing of the pixel circuit further includes providing a third test voltage different from the first and second test voltages to the second node,

wherein the providing of the first test voltage includes:

turning on the third transistor; and

transferring the first test voltage provided through the first test voltage line to the first node through the third transistor,

wherein the providing of the second test voltage includes:

turning on the fifth transistor; and

transferring the second test voltage provided through the third test voltage line to the second node through the fifth transistor and the first transistor, wherein the providing of the third test voltage includes:

turning on the fourth transistor; and

transferring the third test voltage provided through the second test voltage line to the second node through the fourth transistor, and wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a voltage of the first node through the second transistor and the data line.

20 . The method of claim 17 , wherein the providing of the first test voltage includes:

turning on the third transistor; and

transferring the first test voltage provided through the first test voltage line to the first node through the third transistor,

wherein the providing of the second test voltage includes:

turning on the fourth transistor; and

transferring the second test voltage provided through the second test voltage line to the second node through the fourth transistor, and

wherein the detecting of the defect in the pixel circuit includes:

turning on the second transistor; and

measuring a current flowing through the third transistor and the second transistor.