IP Library Granted Patent US 12672538
Granted Patent B2
US 12672538 · App. 17/811,067 · Granted Jun 30, 2026

Method for manufacturing semiconductor device having fuse component

Inventors: Wei-Zhong Li (Taoyuan City, TW); Hsih-Yang Chiu (Taoyuan City, TW)
Assignee: NANYA TECHNOLOGY CORPORATION
H10W20/491H10B20/25H10W20/493
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Quick Facts
Patent No.
US 12672538
App. No.
17/811,067
Granted
Jun 30, 2026
Kind
B2
Abstract

A method of manufacturing a semiconductor device is provided. The method includes providing a substrate having an active area and forming a first diffusion area in the active area. The method also includes disposing a nitride layer on the active area and forming an opening in the nitride layer to expose the first diffusion area. The method also includes disposing an oxide layer in the opening to contact the first diffusion area.

Claims (15)

1 . A method of manufacturing a semiconductor device, comprising:

providing a substrate having an active area;

forming a fuse component having a bottom electrode in the active area, a first dielectric layer on the active area and a top electrode on the first dielectric layer; and

forming a nitride layer on the active area and surrounding the first dielectric layer;

forming a transistor coupling a first voltage to the bottom electrode of the fuse component;

wherein a bottom surface of the nitride layer is in contact with a top surface of the bottom electrode of the fuse component;

wherein the bottom electrode of the fuse component is configured to receive the first voltage to change a resistivity of the first dielectric layer of the fuse component;

wherein the top electrode of the fuse component is configured to receive a second voltage to change the resistivity of the first dielectric layer of the fuse component.

2 . The method of claim 1 , wherein forming the transistor comprises forming a buried conductor in the active area.

3 . The method of claim 1 , wherein forming the bottom electrode of the fuse component comprises forming a diffusion area adjacent to a surface of the active area.

4 . The method of claim 1 , wherein a width of the bottom electrode of the fuse component is greater than a width of the first dielectric layer of the fuse component.

5 . The method of claim 1 , wherein forming the nitride layer comprises forming an opening and the bottom electrode of the fuse component is exposed from the opening.

6 . The method of claim 1 , wherein forming the top electrode of the fuse component comprises forming a recessing portion over the first dielectric layer of the fuse component.

7 . The method of claim 1 , wherein the nitride layer includes silicon nitride (Si 3 N 4 ).

8 . The method of claim 1 , wherein nitrides in the nitride layer and the dielectric layer are different.