IP Library Granted Patent US 12672543
Granted Patent B2
US 12672543 · App. 17/815,629 · Granted Jun 30, 2026

Integrated circuit packages and methods of forming the same

Inventors: Ping-Yin Hsieh (Hsinchu, TW); Chih-Hao Chen (Taipei City, TW); Yi-Huan Liao (Hsinchu, TW); Pu Wang (Hsinchu, TW); Li-Hui Cheng (New Taipei City, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H10W40/255H10W40/22H10W70/02H10W70/093H10W70/095H10W70/635H10W74/012H10W74/016H10W74/117H10W74/121H10W74/15
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Quick Facts
Patent No.
US 12672543
App. No.
17/815,629
Granted
Jun 30, 2026
Kind
B2
Abstract

In an embodiment, a device includes a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a front-side of the package component. The device also includes a back-side metal layer on a back-side of the package component. The device also includes an indium thermal interface material on a back-side of the back-side metal layer. The device also includes a lid on a back-side of the indium thermal interface material. The device also includes a package substrate connected to the conductive connectors, the lid being adhered to the package substrate.

Claims (55)

1 . A method comprising:

packaging a first integrated circuit die and a second integrated circuit die in a package region of a wafer;

depositing a back-side metal layer on back-sides of the first and second integrated circuit dies;

singulating the package region from the wafer to form a package component;

after singulating the package region, connecting the package component to a package substrate;

dispensing a first flux on the back-side metal layer on a back-side of the package component, the first flux only being over a back-side of the first and second integrated circuit dies of the package component with a gap between sections of the first flux;

placing an indium thermal interface material on the first flux; and

attaching a lid to the package substrate, the lid being coupled to the indium thermal interface material.

2 . The method of claim 1 further comprising:

dispensing a second flux on the indium thermal interface material, the second flux being between the indium thermal interface material and the lid.

3 . The method of claim 1 , wherein attaching the lid to the package substrate further comprises:

performing a thermal clamping process to adhere the lid to the package substrate and the indium thermal interface material.

4 . The method of claim 3 , wherein after performing the thermal clamping process, the indium thermal interface material has gaps.

5 . The method of claim 1 , further comprising:

after connecting the package component to the package substrate and before placing the indium thermal interface material on the back-side metal layer, dispensing an adhesive layer on a top surface of the package substrate, the adhesive layer adhering the lid to the package substrate.

6 . The method of claim 1 further comprising:

dispensing a second flux on the thermal interface material, the second flux being between the thermal interface material and the lid.

7 . The method of claim 1 , wherein the metal layer comprises gold, a gold-containing intermetallic compound (IMC) being at an interface of the metal layer and the indium thermal interface material, an interface between the indium thermal interface material and the lid being free of a gold-containing IMC.

8 . The method of claim 1 , wherein packaging the first integrated circuit die and the second integrated circuit die in the package region of the wafer comprises:

bonding the first integrated circuit die and the second integrated circuit die to the wafer;

forming a first underfill between the first integrated circuit die and the second integrated circuit die;

encapsulating the first integrated circuit die and the second integrated circuit die and the underfill with a molding compound, the back-side metal layer being on the molding compound and the first integrated circuit die and the second integrated circuit die.

9 . The method of claim 8 further comprising:

forming a second underfill between the package component and the package substrate; and

attaching passive devices to the package substrate adjacent to the package component, the lid surrounding the passive devices.

10 . A method comprising:

bonding a plurality of integrated circuit dies to a wafer in a package region of the wafer;

encapsulating the plurality of integrated circuit dies with a molding compound;

forming a back-side metal layer on the molding compound and back-sides of the plurality of integrated circuit dies;

singulating the package region from the wafer to form a package component;

bonding the package component to a package substrate;

depositing a first flux on back-sides of the integrated circuit dies of the bonded package component;

attaching a thermal interface material to the first flux, the thermal interface material comprising indium;

attaching a lid to the package substrate, the thermal interface material being coupled to the lid; and

performing a thermal clamping process to attach the lid to the package substrate and the thermal interface material, the thermal clamping process forming gaps in the thermal interface material, at least one of the gaps extending from the back-side metal layer through the first flux into the thermal interface material.

11 . The method of claim 10 further comprising:

before attaching the thermal interface material to the first flux and attaching a lid to the package substrate, plating the thermal interface material on the lid.

12 . A method comprising:

packaging a first integrated circuit die and a second integrated circuit die in a package region of a wafer;

depositing a metal layer on back-side of the first and second integrated circuit dies;

singulating the package region from the wafer to form a package component;

after singulating the package region, connecting the package component to a package substrate;

dispensing a first flux on a back-side of the package component, the first flux being on the metal layer of the package component, a first section of the first flux being over the first integrated circuit die, a second section of the first flux being over the second integrated circuit die, the first section being spaced apart from the second section;

placing an indium thermal interface material on the first flux; and

attaching a lid to the package substrate, the lid being coupled to the indium thermal interface material.

13 . The method of claim 12 , wherein after attaching the lid to the package substrate, the indium thermal interface material has gaps in regions outside of where the indium thermal interface material overlies the integrated circuit die.

14 . The method of claim 12 , wherein attaching the lid to the package substrate further comprises:

performing a thermal clamping process to adhere the lid to the package substrate and the indium thermal interface material.

15 . The method of claim 12 further comprising:

dispensing a second flux on the indium thermal interface material, the second flux being between the indium thermal interface material and the lid.

16 . The method of claim 12 , wherein the indium thermal interface material is wider than the package component.

17 . The method of claim 12 , wherein the indium thermal interface material is thicker than the metal layer.

18 . The method of claim 12 , wherein the metal layer comprises multiple metal layers.

19 . The method of claim 12 , wherein the metal layer comprises aluminum, titanium, titanium nitride, nickel, nickel vanadium, silver, gold, copper, or combinations thereof.

20 . The method of claim 12 , wherein the metal layer comprises gold, a gold-containing intermetallic compound (IMC) being at an interface of the metal layer and the indium thermal interface material, an interface between the indium thermal interface material and the lid being free of a gold-containing IMC.