IP Library Granted Patent US 12672556
Granted Patent B2
US 12672556 · App. 17/651,621 · Granted Jun 30, 2026

Clips for semiconductor package and related methods

Inventors: Inpil Yoo (Unterhaching, DE); Seungwon Im (Seoul, KR); JooYang Eom (Gimpo-si, KR); Jerome Teysseyre (Scottsdale, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H10W70/461H10W70/466H10W70/481H10W72/30H10W72/50H10W72/07337H10W72/352H10W72/652H10W72/655H10W72/884
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Quick Facts
Patent No.
US 12672556
App. No.
17/651,621
Granted
Jun 30, 2026
Kind
B2
Abstract

Implementations of a clip may include a first copper layer directly bonded to a first side of a ceramic layer, a second copper layer directly bonded to a second side of the ceramic layer, the second side of the ceramic layer opposite the first side of the ceramic layer, and a plurality of channels partially etched into a thickness of the second copper layer.

Claims (29)

1 . A semiconductor package comprising:

a direct bond copper (DBC) clip coupled to a plurality of semiconductor die;

a second DBC clip coupled to the plurality of semiconductor die; and

a substrate directly coupled to the DBC clip and the second DBC clip;

wherein the plurality of die are coupled between one of the DBC clip or the second DBC clip and the substrate.

2 . The semiconductor package of claim 1 , wherein the DBC clip comprises a copper layer directly bonded to the plurality of semiconductor die.

3 . The semiconductor package of claim 1 , further comprising one or more channels formed into a copper layer of the DBC clip.

4 . The semiconductor package of claim 3 , wherein the one or more channels are directly over one or more spaces between die of the plurality of semiconductor die.

5 . The semiconductor package of claim 1 , wherein the second DBC clip and the DBC clip are arranged over the substrate in a side-by-side orientation.

6 . The semiconductor package of claim 1 , wherein the plurality of semiconductor die are configured to be cooled on both a first side and a second side.

7 . The semiconductor package of claim 3 , wherein the one or more channels correspond in width and location to one or more spaces between the die of the plurality of semiconductor die.

8 . A semiconductor package comprising:

a first direct bond copper (DBC) clip coupled directly over two or more semiconductor die of a plurality of semiconductor die;

a second DBC clip coupled directly over two or more semiconductor die of the plurality of semiconductor die; and

a substrate directly coupled to the first DBC clip and the second DBC clip;

wherein the plurality of die are coupled between one of the first DBC clip or the second DBC clip and the substrate;

wherein the first DBC clip and the second DBC clip are coupled over the plurality of die in a side-by-side orientation; and

wherein the first DBC clip and the second DBC clip each comprise a plurality of channels formed in a copper layer.

9 . The semiconductor package of claim 8 , wherein the copper layer of the first DBC clip is directly bonded to the plurality of semiconductor die.

10 . The semiconductor package of claim 8 , further comprising a third DBC clip coupled over the plurality of semiconductor die in a side-by-side orientation with the first DBC clip and the second DBC clip.

11 . The semiconductor package of claim 8 , wherein the first DBC clip is directly coupled to a substrate through a first solder pad and the second DBC clip is directly coupled to the substrate through a second solder pad.

12 . The semiconductor package of claim 8 , wherein the plurality of channels extend both partially through and entirely through the copper layer.

13 . The semiconductor package of claim 8 , wherein the plurality of channels are directly over one or more spaces between the one or more semiconductor die.

14 . A semiconductor package comprising:

a direct bond copper (DBC) clip coupled directly over two or more semiconductor die of a plurality of semiconductor die;

a second DBC clip coupled directly over two or more semiconductor die of the plurality of semiconductor die; and

a substrate coupled directly under the plurality of die and directly coupled to the DBC clip and the second DBC clip;

wherein the plurality of die are coupled between one of the DBC clip or the second DBC clip and the substrate.

15 . The semiconductor package of claim 14 , further comprising a plurality of heat dissipation channels in a copper layer of the DBC clip.