IP Library › Granted Patent US 12672566
Granted Patent B2
US 12672566 · App. 18/253,945 · Granted Jun 30, 2026

Wireless chip-to-chip high-speed data transport

Inventors: Tolga Acikalin (San Jose, CA); Tae Young Yang (Portland, OR); Debabani Choudhury (Thousand Oaks, CA); Shuhei Yamada (Vancouver, WA); Roya Doostnejad (Los Altos, CA); Hosein Nikopour (San Jose, CA); Issy Kipnis (Berkeley, CA); Oner Orhan (San Jose, CA); Mehnaz Rahman (San Jose, CA); Kenneth P. Foust (Beaverton, OR); Christopher D. Hull (Portland, OR); Telesphor Kamgaing (Chandler, AZ); Omkar Karhade (Chandler, AZ); Stefano Pellerano (Beaverton, OR); Peter Sagazio (Portland, OR); Sai Vadlamani (Chandler, AZ)
Assignee: Intel Corporation
H10W70/65H01Q1/2283H04B5/72H10W44/20H10W70/685H10W72/072H10W90/00H04B5/22H04B5/24H10W44/209H10W44/234H10W44/248H10W90/722H10W90/724
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Quick Facts
Patent No.
US 12672566
App. No.
18/253,945
Granted
Jun 30, 2026
Kind
B2
Abstract

Various devices, systems, and/or methods perform wireless chip to chip high speed data transmission. Strategies for such transmission include use of improved microbump antennas, wireless chip to chip interconnects, precoding and decoding strategies, channel design to achieve spatial multiplexing gain in line of sight transmissions, open cavity chip design for improved transmission, and/or mixed signal channel equalization.

Claims (47)

1 . A circuit package comprising:

a first chiplet, comprising:

a first side and a second side, opposite to the first side;

a first terminal, connecting to the first side and the second side;

a first solder element, mounted on the first terminal;

a second terminal, connecting to the first side and the second side;

a second solder element, mounted on the second terminal;

a metallic element, operably connected to the second solder element; and

a first transmission line, electrically conductively coupled to the first terminal; wherein the first terminal is configured to receive an electrical signal from the first transmission line and to emit a radiofrequency signal from at least the solder element, wherein the radiofrequency signal represents the received electrical signal,

wherein the metallic element has a shape whose perimeter at least partially surrounds the first terminal.

2 . The circuit package of claim 1 , wherein the metallic element is configured to at least one of inductively or capacitively couple the second solder element with the first solder element.

3 . The circuit package of claim 2 , wherein the at least one of the inductive or capacitive coupling of the metallic element with the first solder element alters an impedance of the second solder element.

4 . The circuit package of claim 1 , wherein the first solder element is electrically conductively connected to a package ground layer and a ground layer of the first chiplet.

5 . The circuit package of claim 1 , further comprising:

a first transmission line, electrically conductively connected to the second terminal;

wherein the second terminal is configured to receive an electrical signal from the first transmission line and to emit a radiofrequency signal from at least the solder element, wherein the radiofrequency signal represents the received electrical signal.

6 . The circuit package of claim 5 , the circuit package of claim 5 , wherein the metallic element is a top-loaded antenna.

7 . The circuit package of claim 5 , wherein the first terminal is electrically shorted.

8 . The circuit package of claim 5 , wherein the first solder element is a solder bump.

9 . A multichip radiofrequency transmission device, comprising:

a first chiplet;

a first antenna;

a first transmission line, coupling the first antenna to the first chiplet, wherein the first antenna is configured to receive an electrical signal from the first transmission line and to emit a radiofrequency signal, wherein the radiofrequency signal represents a received electrical signal;

a second chiplet;

a second antenna; and

a second transmission line, connecting the second antenna to the second chiplet,

wherein a minimum distance between the first chiplet and the second chiplet is greater than a minimum distance between the first antenna and the second antenna.

10 . The multichip radiofrequency transmission device of claim 9 , further comprising:

a third chiplet;

a third antenna; and

a third transmission line, connecting the third antenna to the second chiplet;

wherein a minimum distance between the first chiplet, the second chiplet, and the third chiplet is greater than a minimum distance between the first antenna, the second antenna, and the third antenna.

11 . The multichip radiofrequency transmission device of claim 9 , wherein at least one of the first antenna or the second antenna comprises a plurality of vertically stacked vias.

12 . The multichip radiofrequency transmission device of claim 9 , wherein at least one of the first antenna or the second antenna comprises a plurality of through silicon via (TSV) antennas.

13 . The multichip radiofrequency transmission device of claim 10 , wherein at least one of the first antenna, second antenna, or third antenna is a top-loaded monopole antenna.

14 . The multichip radiofrequency transmission device of claim 9 , further including the first chiplet, wherein the first chiplet includes a transceiver and one or more processors, configured to control the transceiver to transmit a wireless signal via the first antenna to at least the second antenna or a third antenna.

15 . The multichip radiofrequency transmission device of claim 9 , wherein the first transmission line is configured to electrically conductively connect the first antenna to the first chiplet.

16 . The multichip radiofrequency transmission device of claim 9 , wherein the second transmission line is configured to electrically conductively connect the second antenna to the second chiplet; and wherein the third transmission line is configured to electrically conductively connect the third antenna to the third chiplet.

17 . A multichip module comprising:

a chiplet comprising:

a first receive antenna;

a second receive antenna; and

a receiver, configured to:

receive a combined wireless transmission on the first receive antenna and the second receive antenna, wherein the combined wireless transmission represents a first wireless transmission transmitted by a first transmit antenna and a second wireless transmission, different from the first wireless transmission, transmitted by a second transmit antenna; decode the combined wireless transmission according to a predefined decoding parameter to determine the first wireless transmission and the second wireless transmission from the combined wireless transmission; and

send the decoded first wireless transmission to an equalizer and the decoded second wireless transmission to an equalizer.

18 . The multichip module of claim 17 , wherein decoding the combined wireless transmission comprises applying a predetermined weight to at least one of the combined wireless transmission as received on the first receive antenna or the combined wireless transmission as received on the second receive antenna.

19 . The multichip module of claim 18 , wherein the predetermined weight is based on a spatial relationship between the first transmit antenna and the second transmit antenna relative to the first receive antenna and the second receive antenna.