Method of making semiconductor device which includes Fins

1 . A method of manufacturing fins for a semiconductor device, the method comprising:

forming semiconductor fins including ones thereof having a first cap with a first etch sensitivity (first capped fins) and second ones thereof having a second cap with a second etch sensitivity (second capped fins), the first and second etch sensitivities being different; and

eliminating selected ones of the first capped fins and selected ones of the second capped fins.

2 . The method of claim 1 , wherein the eliminating includes:

removing second caps of selected ones of the second capped fins resulting in second uncapped fins;

removing first caps of selected ones of the first capped fins resulting in first uncapped fins; and

removing the first and second uncapped fins.

3 . The method of claim 2 , wherein the removing the second caps of the selected ones of the second capped fins includes:

forming first masks over unselected ones of the second capped fins to leave the selected ones of the second capped fins exposed;

etching the selected ones of the second capped fins with a second etchant appropriate for the second etch sensitivity to remove the second cap from each selected one of the second capped fins resulting in the second uncapped fins; and

removing the first mask.

4 . The method of claim 3 , wherein the forming first masks includes:

extending spans of the first masks to cover some of the first capped fins.

5 . The method of claim 2 , wherein the removing the first caps of the selected ones of the first capped fins includes:

forming second masks over unselected ones of the first capped fins to leave the selected ones of the first capped fins exposed;

etching the selected ones of the first capped fins with a first etchant appropriate for the first etch sensitivity to remove the first cap from each selected one of the first capped fins; and

removing the second masks.

6 . The method of claim 5 , wherein:

the forming second masks includes:

extending spans of the second masks also to cover some of the second capped fins.

7 . The method of claim 1 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers and etch stop layer (ESL) portions;

forming second spacers on corresponding first spacers and ESL portions;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second capped fins; and

removing the second spacers resulting in the first capped fins and the second capped fins.

8 . The method of claim 7 , wherein the forming a first layer includes:

building first mandrel features on the semiconductor substrate to leave first regions of the semiconductor substrate exposed;

building, in some areas of the first regions, the first spacers on the semiconductor substrate, the first spacers abutting sidewalls of the first mandrel features to leave second regions of the semiconductor substrate exposed;

removing the first mandrel features to leave third regions of the semiconductor substrate exposed; and

forming, in the third regions, the ESL portions on the semiconductor substrate, the ESL portions abutting sidewalls of the first spacers.

9 . The method of claim 8 , wherein the forming second spacers on corresponding first spacers and ESL portions includes:

building second mandrel features on areas of the first spacers and ESL portions to leave fourth regions of the first spacers and ESL portions exposed;

building, in some areas of the fourth regions, third spacers so as to abut sidewalls of the second mandrel features and to leave fifth regions of the first spacers and ESL portions exposed;

removing the second mandrel features to leave sixth regions of the first spacers and ESL portions exposed;

building the second spacers on areas of the sixth regions so as to abut sidewalls of the third spacers and to leave seventh regions of the first spacers and ESL portions exposed;

removing the third spacers to leave eighth regions of the first spacers and ESL portions exposed; and

removing the exposed eighth regions of the first spacers and ESL portions and a portion of the semiconductor substrate lying thereunder resulting in the first and second precursors correspondingly of the first and second capped fins.

10 . The method of claim 7 , wherein, relative to a cross section taken along a reference direction parallel to a plane of the semiconductor substrate:

widths of the first spacers and ESL portions are the same;

the first spacers and ESL portions are interleaved into a sequence of pairs;

each pair includes a given one of the first spacers and a given one of the ESL portions; and

the forming second spacers includes:

centering the second spacers over centers of the corresponding first spacers and ESL portions.

11 . The method of claim 1 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers, first etch stop layer (ESL) portions and second spacers such that, relative to a reference direction parallel to a plane of the semiconductor substrate,

each second spacer abuts a corresponding one of the first spacers and a corresponding one of the first ESL portions,

each first spacer abuts corresponding ones of the second spacers, and

each first ESL portion abuts corresponding ones of the second spacers;

forming second ESL portions correspondingly on the first spacers and the first ESL portions;

removing the second spacers;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second capped fins; and

removing the second ESL portions resulting in the first and second capped fins.

12 . The method of claim 11 , wherein the forming a first layer includes:

building first mandrel features on the semiconductor substrate to leave first regions of the semiconductor substrate exposed;

building, in some areas of the first regions, second spacers on the semiconductor substrate, the second spacers abutting sidewalls of the first mandrel features to leave second regions of the semiconductor substrate exposed;

removing the first mandrel features to leave third regions of the semiconductor substrate exposed;

building, in some areas of the third regions, the first spacers on the semiconductor substrate, the first spacers abutting sidewalls of the second spacers;

removing the second spacers to leave fourth regions of the semiconductor substrate exposed;

building, in some areas of the fourth regions, the second spacers on the semiconductor substrate, the second spacers abutting sidewalls of the first spacers to leave fifth regions of the semiconductor substrate exposed; and

forming, in the fifth regions, the first ESL portions on the semiconductor substrate, the first ESL portions abutting sidewalls of the second spacers.

13 . The method of claim 12 , wherein the forming second ESL portions includes:

removing portions of the first spacers and the first ESL portions thereby to shorten the first spacers and the first ESL portions resulting in gaps between the second spacers over the shortened first spacers and the shortened first ESL portions;

depositing a layer of second etch-stop material on the second spacers, the shortened first spacers and the shortened first ESL portions; and

removing a part of the layer of second etch-stop material to expose the second spacers.

14 . A method of manufacturing fins for a semiconductor device, the method comprising:

forming semiconductor fins including ones thereof having a first cap with a first etch sensitivity (first capped fins) and second ones thereof having a second cap with a second etch sensitivity (second capped fins), the first and second etch sensitivities being different;

removing second caps and first caps correspondingly of selected ones of the second capped fins and the first capped fins; resulting in second and first uncapped fins; and

removing the first and second uncapped fins.

15 . The method of claim 14 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers and etch stop layer (ESL) portions;

forming second spacers on corresponding first spacers and ESL portions;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second uncapped fins; and

removing the second spacers resulting in the first capped fins and the second capped fins.

16 . The method of claim 15 , wherein, relative to a cross section taken along a reference direction parallel to a plane of the semiconductor substrate:

widths of the first spacers and ESL portions are the same;

the first spacers and ESL portions are interleaved into a sequence of pairs;

each pair includes a given one of the first spacers and a given one of the ESL portions; and

the forming second spacers includes:

centering the second spacers over centers of the corresponding first spacers and ESL portions.

17 . The method of claim 14 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers, first etch stop layer (ESL) portions and second spacers such that, relative to a reference direction parallel to a plane of the semiconductor substrate,

each second spacer abuts a corresponding one of the first spacers and a corresponding one of the first ESL portions,

each first spacer abuts corresponding ones of the second spacers, and

each first ESL portion abuts corresponding ones of the second spacers;

forming second ESL portions correspondingly on the first spacers and the first ESL portions;

removing the second spacers;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second capped fins; and

removing the second ESL portions resulting in the first and second capped fins.

18 . A method of manufacturing fins for a semiconductor device, the method comprising:

forming semiconductor fins including ones thereof having a first cap with a first etch sensitivity (first capped fins) and second ones thereof having a second cap with a second etch sensitivity (second capped fins), the first and second etch sensitivities being different;

forming first masks over unselected second capped fins so as to leave selected second capped fins exposed;

etching with an etchant appropriate for the second etch resulting in second uncapped fins;

removing the first mask;

forming second masks over unselected ones of the first capped fins so as to leave selected first capped fins exposed;

etching with an etchant appropriate for the first etch sensitivity resulting in first uncapped fins; and

removing the second masks; and

removing the first and second uncapped fins.

19 . The method of claim 18 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers and etch stop layer (ESL) portions;

forming second spacers on corresponding first spacers and ESL portions;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second uncapped fins; and

removing the second spacers resulting in the first capped fins and the second capped fins.

20 . The method of claim 18 , wherein, before the forming semiconductor fins, the method further comprises:

forming a first layer on a semiconductor substrate, the first layer having interspersed first spacers, first etch stop layer (ESL) portions and second spacers such that, relative to a reference direction parallel to a plane of the semiconductor substrate,

each second spacer abuts a corresponding one of the first spacers and a corresponding one of the first ESL portions,

each first spacer abuts corresponding ones of the second spacers, and

each first ESL portion abuts corresponding ones of the second spacers;

forming second ESL portions correspondingly on the first spacers and the first ESL portions;

removing the second spacers;

removing exposed regions of the first spacers and ESL portions and portions of the semiconductor substrate lying thereunder resulting in first and second precursors correspondingly of the first and second capped fins; and

removing the second ESL portions resulting in the first and second capped fins.