Interposer for an ultrasound transducer array
For transducer connection to an integrated circuit, a silicon or other wafer-based chip is processed to provide signal routing, such as altering the pitch using wafer process deposited conductors. This chip or silicon interposer may be more simply re-designed to relate the pitch of an array to the integrated circuit I/Os, avoiding redesign of the integrated circuit.
1 . A multidimensional transducer array system, the system comprising:
an acoustic array having transducer elements distributed in a grid over two dimensions;
a silicon interposer having a first surface with conductors electrically connected to the acoustic array, the conductors extending in the silicon interposer to a second surface opposite the first surface, the silicon interposer comprising a conductor distribution layer having deposited wiring in multiple layers interconnected by vias extending only part of a depth through the conductor distribution layer as part of electrical paths extending entirely through the conductor distribution layer, the deposited wiring in the multiple layers and vias forming the conductors within the conductor distribution layer, the conductor distribution layer changing the conductors from a pitch of the elements to a pitch of pads of the integrated circuit;
a flexible circuit material positioned between the acoustic array and the silicon interposer, the flexible circuit material having vias connecting from the elements to the first surface;
an integrated circuit having transmit and/or receive circuits for ultrasound scanning with the acoustic array, the integrated circuit electrically connected to the conductors on the second surface of the silicon interposer; and
an adaptor between the acoustic array and the silicon interposer, the adaptor having a curved surface on which the acoustic array rests as a curved array.
2 . The multidimensional transducer array system of claim 1 wherein the conductors include vias formed in a silicon wafer portion of the silicon interposer, the silicon wafer portion adjacent the conductor distribution layer of the silicon interposer.
3 . The multidimensional transducer array system of claim 1 wherein the conductor distribution layer having the deposited wiring comprises wafer process layers as the multiple layers, the wafer process layers formed with a back-end-of-line or redistribution layer wafer fabrication.
4 . The multidimensional transducer array system of claim 1 wherein the transducer elements are separated by kerfs and each comprise a matching layer, a piezoelectric, a de-matching layer, and a signal electrode, the signal electrodes electrically connected to the conductors.
5 . The multidimensional transducer array system of claim 1 wherein one or more passive electrical components are integrated within the silicon interposer and are electrically connected to the integrated circuit.
6 . The multidimensional transducer array system of claim 1 wherein the integrated circuit comprises two or more tiled chips connected with the silicon interposer.
7 . The multidimensional transducer array system of claim 1 wherein the silicon interposer comprises two or more tiled chips.
8 . The multidimensional transducer array system of claim 1 wherein two layers of the flexible circuit material are between the silicon interposer and the acoustic array.
9 . The multidimensional transducer array system of claim 1 wherein electrical joints on the first surface are larger than electrical joints on the second surface.
10 . The multidimensional transducer array system of claim 1 wherein the integrated circuit is in direct contact with the silicon interposer.
11 . The multidimensional transducer array system of claim 1 wherein the silicon interposer has vias with polymer liners.
12 . A method for connecting electronics with an array of acoustic elements, the method comprising:
forming a wiring layer redistributing conductors, the wiring layer formed on a wafer with a wafer process comprising back-end-of-line or redistribution layer, the wafer having vias at constant pitch through the wafer, the wiring layer changing the pitch;
connecting a flexible circuit material to a wafer part of the wafer opposite the wiring layer and to the array;
connecting the wiring layer to an integrated circuit, the connecting electrically connecting the acoustic elements to pads of the integrated circuit through the wafer and wiring layer, wherein connecting the wiring layer comprises connecting the wiring layer to the integrated circuit, and then connecting the wafer part to the flexible circuit material.
13 . The method of claim 12 wherein connecting the flexible circuit material to the array comprises connecting the array to a first flexible circuit material, connecting the wafer part to a second flexible circuit material, and connecting the first flexible circuit material to the second flexible circuit material.
14 . The method of claim 12 wherein forming the wiring layer comprises forming capacitors on the wafer, the capacitors connected with the integrated circuit as part of connecting the wafer part between the array and the integrated circuit.