Electrodeposition of metals using an ionically resistive ionically permeable element or a shield spatially tailored to die-level patterns on a substrate
An apparatus for electroplating a metal on a semiconductor substrate with high control over plated thickness on a die-level includes an ionically resistive ionically permeable element (e.g., a plate with channels), where the element allows for flow of ionic current through the element towards the substrate during electroplating, where the element includes a plurality of regions, each region having a pattern of varied local resistance, and where the pattern of varied local resistance repeats in at least two regions. An electroplating method includes providing a semiconductor substrate to an electroplating apparatus having an ionically resistive ionically permeable element or a grid-like shield having a pattern correlating with a pattern of features on the substrate, and plating metal, while the pattern on the substrate remains spatially aligned with the pattern of the element or the grid-like shield for at least a portion of the total electroplating time.
1 . An electroplating apparatus comprising:
(a) a plating chamber configured to contain an electrolyte and an anode while electroplating metal onto a semiconductor substrate;
(b) a substrate holder configured to hold the semiconductor substrate such that a plating face of the substrate is separated from the anode during electroplating; and
(c) an ionically resistive ionically permeable element comprising a substrate-facing surface and an opposing surface, wherein the element allows for flow of ionic current through the element towards the substrate during electroplating, wherein the element comprises a plurality of regions, each region having a pattern of varied local resistance, and wherein the pattern of varied local resistance repeats in at least two regions.
2 . The electroplating apparatus of claim 1 , wherein each of the at least two regions has a length of at least about 5 mm.
3 . The electroplating apparatus of claim 1 , wherein each of the at least two regions has a length of between about 5-50 mm.
4 . The electroplating apparatus of claim 1 , wherein the ionically resistive ionically permeable element comprises at least five regions with repeating pattern of varied local resistance.
5 . The electroplating apparatus of claim 1 , wherein each region has a pattern with varied local porosity.
6 . The electroplating apparatus of claim 5 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local porosity comprises a pattern of channels with different diameters.
7 . The electroplating apparatus of claim 6 , wherein at least some of the channels have a varying diameter such that the at least some channels have smaller diameter on a first surface of the ionically resistive ionically permeable element than on a surface opposing the first surface.
8 . The electroplating apparatus of claim 5 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local porosity comprises a pattern of angled channels having different length.
9 . The electroplating apparatus of claim 5 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local porosity comprises a pattern of helical channels having different length.
10 . The electroplating apparatus of claim 1 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local resistance comprises a pattern of channels having different length.
11 . The electroplating apparatus of claim 1 , wherein the ionically resistive ionically permeable element is a plate having a plurality of through-channels, wherein channel diameters at the substrate-facing surface of the ionically resistive ionically permeable element are less than about 2 mm.
12 . The electroplating apparatus of claim 1 , wherein the ionically resistive ionically permeable element is positioned such that a distance from the substrate-facing surface of the ionically resistive ionically permeable element to the plating face of the semiconductor substrate is 10 mm or less.
13 . An electroplating apparatus comprising:
(a) a plating chamber configured to contain an electrolyte and an anode while electroplating metal onto a semiconductor substrate;
(b) a substrate holder configured to hold the semiconductor substrate such that a plating face of the substrate is separated from the anode during electroplating; and
(c) a shield positioned within about 10 mm of the plating face of the semiconductor substrate, wherein the shield has a grid-like shape with a plurality of regions, each region comprising at least one opening, wherein each region has a pattern of varied local resistance, and wherein the pattern of varied local resistance repeats in at least two regions.
14 . The apparatus of claim 13 , wherein the shield is configured to be moved during electroplating such as to agitate the electrolyte near the plating surface of the semiconductor substrate.
15 . The apparatus of claim 14 , wherein the shield comprises one or more protrusions and/or has variable thickness configured to facilitate agitation of the electrolyte during shield movement.
16 . The electroplating apparatus of claim 1 , wherein the apparatus is further configured to generate a lateral flow of electrolyte in a direction parallel to the plating face of the semiconductor substrate.
17 . The electroplating apparatus of claim 1 , further comprising a uniform ionically resistive ionically permeable element stacked with the ionically resistive ionically permeable element of claim 1 .
18 . An ionically resistive ionically permeable element, wherein the element is configured to allow for flow of ionic current through the element towards a substrate during electroplating, wherein the element comprises a plurality of regions, each region having a pattern of varied local resistance, and wherein the pattern of varied local resistance repeats in at least two regions.
19 . The ionically resistive ionically permeable element of claim 18 , wherein each of the at least two regions has a length of at least about 5 mm.
20 . The ionically resistive ionically permeable element of claim 18 , wherein each of the at least two regions has a length of between about 5-50 mm.
21 . The ionically resistive ionically permeable element of claim 18 , wherein each region has a pattern with varied local porosity.
22 . The ionically resistive ionically permeable element of claim 21 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local porosity comprises a pattern of channels with different diameters.
23 . The ionically resistive ionically permeable element of claim 22 , wherein the ionically resistive ionically permeable element comprises channels having a smaller diameter on one side of the ionically resistive element than on an opposing side.
24 . The ionically resistive ionically permeable element of claim 21 , wherein the ionically resistive ionically permeable element comprises non-communicating through-channels, and wherein the pattern of varied local porosity comprises a pattern of angled channels having different length.
25 . A method of electrodepositing a metal onto a semiconductor substrate, the method comprising:
(a) providing a semiconductor substrate having a pattern of features into an electroplating apparatus, wherein the electroplating apparatus comprises an ionically resistive ionically permeable element or a grid-like shield having a plurality of openings, wherein the ionically resistive ionically permeable element or the grid-like shield is positioned within about 10 mm of a plating face of the semiconductor substrate, and wherein the ionically resistive ionically permeable element or the grid like shield comprise a pattern correlating to the pattern of features of the semiconductor substrate;
(b) registering orientation of the semiconductor substrate with the ionically resistive element or the grid-like shield such that the pattern of the features on the semiconductor substrate and the matching pattern of the ionically resistive element or the grid-like shield are spatially aligned; and
(c) electroplating metal onto the semiconductor substrate, while maintaining the semiconductor substrate stationary or spatially aligned relative to the ionically resistive element or the grid-like shield at least during a portion of a total electroplating time.
26 . The method of claim 25 , wherein the features on the semiconductor substrate are through-mask features, and wherein isolated regions of through-mask features are matched with more resistive portions of the ionically resistive ionically permeable element or are more shielded by the grid-like shield than denser regions of through-mask features.
27 . The method of claim 25 , wherein the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive element or the grid-like shield for at least 10% of the total electroplating time.
28 . The method of claim 25 , wherein the method comprises providing a lateral flow of electrolyte parallel to the semiconductor substrate during electroplating.
29 . The method of claim 28 , wherein (c) comprises electroplating metal onto the semiconductor substrate, wherein the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive element or the grid-like shield during the total electroplating time.
30 . The method of claim 28 , wherein (c) comprises electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive element or the grid-like shield during about 30-90% of the total electroplating time and such that the semiconductor substrate is rotated relative to the ionically resistive element or the grid-like shield during about the remainder of the total electroplating time.
31 . The method of claim 28 , wherein (c) comprises electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains spatially aligned relative to the ionically resistive element or the grid-like shield during about 30-90% of the total electroplating time and such that the semiconductor substrate is rotated relative to the ionically resistive element or the grid-like shield for the remaining time of the total electroplating time, wherein the ionically resistive ionically permeable element or the grid-like shield is moved with respect to the semiconductor substrate in at least one of rotational and lateral translational movement.
32 . The method of claim 28 , wherein the semiconductor substrate has a symmetrical pattern of features and wherein (c) comprises: (i) electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive element or the grid-like shield during a portion of the total electroplating time; (ii) rotating the substrate relative to the ionically resistive element or the grid-like shield by 180 degrees; and (iii) continuing electroplating in a new orientation.
33 . The method of claim 32 , further comprising repeating (i)-(iii) at least once.
34 . The method of claim 28 , wherein the semiconductor substrate has a symmetrical pattern of features and wherein (c) comprises: (i) electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive element or the grid-like shield during a portion of the total electroplating time; (ii) rotating the substrate relative to the ionically resistive element or the grid-like shield by 90 degrees; and (iii) continuing electroplating in a new orientation.
35 . The method of claim 28 , wherein (c) comprises electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive ionically permeable element or the grid-like shield during a portion of the total electroplating time in a first electroplating cell; and electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to a second ionically resistive ionically permeable element or a second grid-like shield during a portion of the total electroplating time in a second electroplating cell, wherein both in the first cell and the second cell matching and registration for the semiconductor substrate feature pattern is retained, but wherein a direction of lateral flow in the second cell is opposite relative to the features of the semiconductor substrate from the first cell.
36 . The method of claim 28 , wherein (c) comprises electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to the ionically resistive ionically permeable element or the grid-like shield during a portion of the total electroplating time in a first electroplating cell; and electroplating metal onto the semiconductor substrate, such that the semiconductor substrate remains stationary or spatially aligned relative to a second ionically resistive ionically permeable element or a second grid-like shield during a portion of the total electroplating time in a second electroplating cell, wherein both in the first cell and the second cell matching and registration for the semiconductor substrate feature pattern is retained, but wherein a direction of lateral flow in the second cell is different relative to the features of the semiconductor substrate from the first cell; and continue transferring the semiconductor substrate consecutively to multiple electroplating cells and electroplating in multiple electroplating cells, wherein a direction of lateral flow in the cells relative to the features of the semiconductor substrate is different.
37 . The method of claim 28 , wherein (c) comprises varying a direction of lateral electrolyte flow during electroplating.
38 . The method of claim 25 , further comprising:
applying photoresist to the semiconductor substrate;
exposing the photoresist to light;
patterning the photoresist and transferring the pattern to the semiconductor substrate; and
selectively removing the photoresist from the semiconductor substrate.