Evaluation circuit, semiconductor device, and evaluation method

1 . An evaluation circuit comprising a transistor and further comprising:

a first switch element disposed between a drain of the transistor and a first drain power supply;

a second switch element connected in parallel to the first switch element and disposed between the drain and a power supply which is grounded or has a negative value;

a third switch element disposed between the drain of the transistor and a second drain power supply; and

a fourth switch element disposed between the first drain power supply and the source power supply and connected to the transistor and the first switch element in parallel;

wherein a source of the transistor is electrically connected to a source power supply,

wherein, a voltage applied to the power supply is equal to a voltage applied to the source power supply, and

wherein the third switch element is electrically connected to a second drain power-supply pad,

wherein element characteristics of the fourth switch element are the same as element characteristics of the first switch element.

2 . The evaluation circuit as claimed in claim 1 , wherein none of the first, second, third, and fourth switch element is disposed on the source of the transistor.

3 . The evaluation circuit as claimed in claim 1 , wherein one of the first, second, third, and fourth switch elements comprises two field effect transistors, source terminals of the two field effect transistors are connected to each other, and drain terminals of the two field effect transistors are connected to each other.

4 . The evaluation circuit as claimed in claim 1 ,

wherein the first drain power supply is a voltage applied to a first drain power-supply pad,

wherein the second drain power supply is a voltage applied to a second drain power-supply pad,

wherein the power supply is a voltage applied to a power-supply pad, and

wherein the source power supply is a voltage applied to a source power-supply pad.

5 . The evaluation circuit as claimed in claim 1 ,

wherein the first drain power supply is a voltage applied to the drain of the transistor from a first drain power-supply pad,

wherein the second drain power supply is a voltage applied to the drain of the transistor from a second drain power-supply pad,

wherein the power supply is a voltage applied to the drain of the transistor from a power-supply pad, and

wherein the source power supply is a voltage applied to the source of the transistor from a source power-supply pad.

6 . The evaluation circuit as claimed in claim 5 , wherein the voltage applied to the drain of the transistor from the power-supply pad is equal to the voltage applied to the source of the transistor from the source power-supply pad.

7 . The evaluation circuit as claimed in claim 1 ,

wherein the evaluation circuit operates to measure an element-to-be-measured in the evaluation circuit;

wherein in response to that the evaluation circuit operates to measure an element-to-be-measured comprising the first switch element and the third switch element, in the evaluation circuit used to element-to-be-measured being another element, the first switch element and the third switch element are in a turned-on state, and

in response to that the evaluation circuit operates to measure the element-to-be-measured being another element, other than the first switch element and the third switch element, the first switch element and the third switch element are in a turned-off state.

8 . A semiconductor device comprising:

a first drain power-supply pad;

a power-supply pad, which is grounded or has a negative value;

a source power-supply pad;

a second drain power-supply pad; and

an evaluation circuit comprising:

a transistor;

a first switch element disposed between a drain of the transistor and the first drain power-supply pad;

a second switch element connected in parallel to the first switch element and disposed between the drain and the power-supply pad;

a third switch element disposed between the drain of the transistor and the second drain power-supply pad; and

a fourth switch element disposed between the first drain power-supply pad and the source power-supply pad and connected to the transistor and the first switch element in parallel;

wherein a source of the transistor is electrically connected to the source power-supply pad,

wherein, a voltage applied to the power supply pad is equal to a voltage applied to the source power-supply pad, and

wherein element characteristics of the fourth switch element are the same as element characteristics of the first switch element.

9 . The semiconductor device as claimed in claim 8 , wherein none of the first, second, third, and fourth switch element is disposed on the source of the transistor.

10 . The semiconductor device as claimed in claim 8 , wherein one of the first, second, third, and fourth switch elements comprises two field effect transistors, source terminals of the two field effect transistors are connected to each other, and drain terminals of the two field effect transistors are connected to each other.

11 . The semiconductor device as claimed in claim 8 , wherein:

a first drain power supply is applied to the drain of the transistor through the first drain power-supply pad,

a second drain power supply is applied to the drain of the transistor through the second drain power-supply pad,

a voltage is applied to the drain of the transistor through the power-supply pad, and

a source power supply is applied to the source of the transistor from the source power-supply pad.

12 . The semiconductor device as claimed in claim 11 , wherein the voltage applied to the drain of the transistor through the power-supply pad is equal to a voltage of the source power supply applied to the source of the transistor through the source power-supply pad.

13 . The semiconductor device as claimed in claim 8 ,

wherein the evaluation circuit operates to measure an element-to-be-measured in the evaluation circuit;

wherein in response to that the evaluation circuit operates to measure an element-to-be-measured comprising the first switch element and the third switch element, in the evaluation circuit used to element-to-be-measured being another element, the first switch element and the third switch element are in a turned-on state, and

in response to that the evaluation circuit operates to measure the element-to-be-measured being another element, other than the first switch element and the third switch element, the first switch element and the third switch element are in a turned-off state.

14 . An evaluation method comprising:

through using an evaluation circuit as claimed in claim 1 , measuring an element-to-be-measured in the evaluation circuit;

in response to the element-to-be-measured comprising the first switch element and the third switch element, causing the first switch element and the third switch element to be in a turned-on state; and

in response to the element-to-be-measured being another element, other than the first switch element and the third switch element, causing the first switch element and the third switch element to be in a turned-off state for measurement of the element.

15 . The evaluation method as claimed in claim 14 , wherein the evaluation circuit further comprises a second switch element disposed between the drain of the transistor and the power supply, and the evaluation method further comprises:

in response to the element-to-be-measured comprising the first switch element and the third switch element, causing the second switch element to be in the turned-off state; and

in response to the element-to-be-measured being another element, other than the first switch element and the third switch element, causing the second switch element to be in the turned-on state.