IP Library Granted Patent US 12674932
Granted Patent B2
US 12674932 · App. 18/636,725 · Granted Jul 7, 2026

Optical waveguide mounted substrate and method of making the same

Inventor: Hisashi Kaneda (Nagano, JP)
Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
G02B6/12002G02B6/43G02B6/12004
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Quick Facts
Patent No.
US 12674932
App. No.
18/636,725
Granted
Jul 7, 2026
Kind
B2
Abstract

An optical waveguide mounted substrate includes an interconnect substrate having a recess that opens on a first surface thereof, and an optical waveguide device including: an optical waveguide substrate including a support and a core layer disposed on the support; and a silicon photonic chip including a silicon substrate and a silicon waveguide disposed on the silicon substrate, the silicon waveguide being optically coupled with the core layer, wherein the optical waveguide substrate is mounted on the interconnect substrate such that the core layer faces away from the recess and at least a part of a thickness of the support is situated inside the recess.

Claims (26)

1 . An optical waveguide mounted substrate comprising:

an interconnect substrate having a recess that opens on a first surface thereof, and

an optical waveguide device including:

an optical waveguide substrate including a support and a core layer disposed on the support; and

a silicon photonic chip including a silicon substrate and a silicon waveguide disposed on the silicon substrate, the silicon waveguide being optically coupled with the core layer,

wherein the optical waveguide substrate is mounted on the interconnect substrate, after the silicon waveguide is coupled to the core layer, such that the core layer faces away from the recess and at least a part of a thickness of the support is situated inside the recess.

2 . The optical waveguide mounted substrate as claimed in claim 1 , further comprising a first resin disposed in a space between the recess and the support facing each other.

3 . The optical waveguide mounted substrate as claimed in claim 2 , wherein the silicon photonic chip is flip-chip mounted on the first surface.

4 . The optical waveguide mounted substrate as claimed in claim 3 , further comprising a second resin disposed in a space between the silicon substrate and the first surface facing each other.

5 . The optical waveguide mounted substrate as claimed in claim 2 , wherein

the support includes a through interconnect penetrating through the support, and

the silicon photonic chip is flip-chip mounted on a second surface of the support where the core layer is provided, such as to be electrically connected to one end of the through interconnect, and

another end of the through interconnect is electrically connected to the interconnect substrate inside the recess.

6 . The optical waveguide mounted substrate as claimed in claim 5 , further comprising a second resin disposed in a space between the silicon substrate and the second surface facing each other.

7 . The optical waveguide mounted substrate as claimed in claim 4 , wherein the first resin and the second resin are seamlessly formed of a same material.

8 . The optical waveguide mounted substrate as claimed in claim 3 , wherein the support is a glass substrate.

9 . An optical waveguide mounted substrate comprising:

an interconnect substrate having a recess that opens on a first surface thereof; and

an optical waveguide device including:

an optical waveguide substrate including a support and a core layer disposed on the support; and

a silicon photonic chip including a silicon substrate and a silicon waveguide disposed on the silicon substrate, the silicon waveguide being optically coupled with the core layer,

wherein the optical waveguide substrate is mounted on the interconnect substrate such that the core layer faces away from the recess and at least a part of a thickness of the support is situated inside the recess,

wherein

the support includes a through interconnect penetrating through the support, and

the silicon photonic chip is flip-chip mounted on a second surface of the support where the core layer is provided, such as to be electrically connected to one end of the through interconnect, and

another end of the through interconnect is electrically connected to the interconnect substrate inside the recess.