IP Library Granted Patent US 12675292
Granted Patent B2
US 12675292 · App. 18/474,207 · Granted Jul 7, 2026

Instruction conversion device, instruction conversion method, instruction conversion system, and processor for converting extended instructions based on an emulation flag

Inventors: Weilin Wang (Beijing, CN); Yingbing Guan (Shanghai, CN); Mengchen Yang (Beijing, CN)
Assignee: Shanghai Zhaoxin Semiconductor Co., Ltd.
G06F9/30145G06F9/30047G06F9/30101G06F9/3017G06F9/30174G06F9/30185G06F9/30189G06F9/3814G06F9/3854G06F9/3858G06F9/455G06F9/45516G06F9/4812G06F11/0772
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12675292
App. No.
18/474,207
Granted
Jul 7, 2026
Kind
B2
Abstract

An instruction conversion system including a processor is provided. The processor receives a ready-for-execution instruction from an application program. The processor decodes the ready-for-execution instruction, and determines that the ready-for-execution instruction is an extended instruction. The processor sends the information of the ready-for-execution instruction to an external conversion system. The conversion system converts the ready-for-execution instruction into a converted instruction sequence, and then sends the converted instruction sequence to the processor for executions.

Claims (13)

1 . An instruction conversion system, comprising:

a processor receiving a ready-for-execution instruction from an application program, wherein a register of the processor includes an emulation flag which indicates whether a format type of the ready-for-execution instruction is an extended instruction, wherein the processor includes:

a monitor, configured to set the emulation flag included in the register of the processor as a first logic level for indicating the format type of the ready-for-execution instruction is an extended instruction; and

a conversion cache, including a controller and an extended instruction storage table, wherein the controller of the conversion cache is configured to compare the format type of the ready-for-execution instruction with a valid extended instruction tag stored in the extended instruction storage table of the conversion cache,

wherein the processor is configured to decode the ready-for-execution instruction, and the processor is configured to determine that the ready-for-execution instruction is an extended instruction based on the emulation flag; and then

the processor is configured to send information of the ready-for-execution instruction to an external conversion system, the external conversion system is configured to convert the ready-for-execution instruction into a converted instruction sequence, and then the external conversion system is configured to send the converted instruction sequence to the processor for execution.

2 . The instruction conversion system according to claim 1 , wherein the conversion cache is used for storing the converted instruction sequence.

3 . The instruction conversion system according to claim 2 , wherein the monitor determines whether the conversion cache has stored the converted instruction sequence of the ready-for-execution instruction if the monitor determines that the ready-for-execution instruction is the extended instruction.

4 . The instruction conversion system according to claim 3 , wherein the converted instruction sequence is sent to the processor for execution if the monitor determines that the ready-for-execution instruction is the extended instruction and the conversion cache has stored the converted instruction sequence of the ready-for-execution instruction.

5 . The instruction conversion system according to claim 3 , wherein the emulation flag is asserted by the monitor if the monitor determines that the ready-for-execution instruction is the extended instruction and the conversion cache has not stored the converted instruction sequence of the ready-for-execution instruction.

6 . The instruction conversion system according to claim 5 , wherein the emulation flag is asserted by the monitor and the ready-for-execution instruction is sent to a reordering buffer of the processor if the monitor determines that the ready-for-execution instruction is the extended instruction and the conversion cache has not stored the converted instruction sequence of the ready-for-execution instruction.

7 . The instruction conversion system according to claim 6 , wherein the ready-for-execution instruction is sent to the reordering buffer by the monitor, and the reordering buffer notifies the external conversion system through an interrupt request if the monitor determines that the ready-for-execution instruction is the extended instruction and the conversion cache has not stored the converted instruction sequence of the ready-for-execution instruction.

8 . The instruction conversion system according to claim 2 , wherein if the monitor determines that the ready-for-execution instruction is the extended instruction and the conversion cache has not stored the converted instruction sequence of the ready-for-execution instruction, the emulation flag is asserted by the monitor and the ready-for-execution instruction is sent to a reordering buffer of the processor, and the reordering buffer notifies the external conversion system through an interrupt request to convert the ready-for-execution instruction into the converted instruction sequence, and the converted instruction sequence is sent to the processor for execution.