Electronic system having an integrated master circuit and an integrated slave circuit
The present disclosure relates to an electronic system including a master IC, a slave IC and a serial communication interface having a bidirectional data line and a clock line. The master IC is configured to send a data request command to the slave IC via the data line. The slave IC is configured to begin providing requested data in response to the data request command. The slave IC is configured to deactivate the clock line after receiving a data read command and until the slave IC can provide the requested data. The master IC is configured to measure a duration of the deactivation of the clock line and to set a wait time between a next data request command and a next data read command according to the measured duration.
1 . An electronic system, comprising:
a master integrated circuit (IC);
a slave IC; and
a serial communication interface having a bidirectional data line and a clock line,
wherein the serial communication interface is configured to transfer data between the master IC and the slave IC,
wherein the master IC is configured to send a data request command to the slave IC via the bidirectional data line,
wherein the slave IC is configured to begin providing requested data based on the data request command,
wherein the master IC is configured to send a data read command; for reading the requested data to the slave IC via the bidirectional data line, after sending the data request command,
wherein the slave IC is configured to deactivate the clock line after receiving the data read command until the slave IC can provide the requested data,
wherein the master IC is configured to measure a duration of a deactivation of the clock line, and
wherein the master IC is configured to set a wait time between a next data request command and a next data read command according to the measured duration.
2 . The electronic system as claimed in claim 1 , wherein the master IC is configured to send the data read command to the slave IC after a specified minimum data provision time has elapsed since a time at which the data request command is sent,
wherein the slave IC is configured, if the requested data is not yet completely available after the specified minimum data provision time, to deactivate the clock line until the slave IC can provide the requested data,
wherein the master IC is configured to measure the duration of the deactivation of the clock line, and
wherein the master IC is configured to set the wait time between the next data request command and the next data read command according to the minimum data provision time and the measured duration.
3 . The electronic system as claimed in claim 1 , wherein the master IC is configured to maintain the wait time for a plurality of subsequent data request commands and next data read commands, and then to determine an updated wait time.
4 . The electronic system as claimed in claim 1 , wherein the master IC is configured to use the wait time for a data request command and a subsequent data read command and then to reduce the wait time between the data request command and the data read command until a renewed deactivation of the clock line is detected by the slave IC, in order to be able to provide the requested data on the bidirectional data line.
5 . The electronic system as claimed in claim 4 , wherein the master IC is configured to measure a duration of the renewed deactivation of the clock line, and to set a re-updated wait time between the next data provision command and the subsequent data read command according to the measured duration.
6 . The electronic system as claimed in claim 1 , wherein the master IC comprises a microcontroller.
7 . The electronic system as claimed in claim 1 , wherein the slave IC comprises a sensor IC.
8 . The electronic system as claimed in claim 1 , wherein the slave IC comprises a magnetic field sensor IC.
9 . The electronic system as claimed in claim 1 , wherein the slave IC comprises a 3D Hall sensor IC.
10 . The electronic system as claimed in claim 1 , wherein the serial communication interface comprises an I 2 C communication interface.
11 . An integrated circuit, IC, comprising:
a serial communication interface having a bidirectional data line and a clock line, wherein the communication interface is configured to transfer data between the IC and an additional IC via the bidirectional data line; and
a processor which is configured to;
send a data request command to the additional IC via the bidirectional data line,
send a data read command to the additional IC via the bidirectional data line after a wait time after a time at which the data request command is sent,
measure a duration of a deactivation of the clock line by the additional IC after a time at which the data read command is sent, and
update the wait time between a next data request command and a subsequent data read command according to the measured duration.
12 . The IC as claimed in claim 11 , wherein the processor is configured to send the data read command to the additional IC after a specified minimum data provision time has elapsed since the time at which the data request command is sent.
13 . The IC as claimed in claim 11 , wherein the processor is configured to maintain the updated wait time for a plurality of following data request commands and data read commands, and then to determine a renewed updated wait time.
14 . The IC as claimed in claim 11 , wherein the processor is configured to;
use the updated wait time for the next data request command and the next data read command; and
reduce the wait time between data request command and data read command until a renewed deactivation of the clock line is detected by the additional IC.
15 . The IC as claimed in claim 11 , wherein the IC is configured as a microcontroller.
16 . The IC as claimed in claim 11 , wherein the data request command comprises a command to a sensor IC for measuring sensor data.
17 . A system comprising:
a master integrated circuit (IC) configured to:
send a data request command to a slave IC via a bidirectional data line to cause the slave IC to begin providing requested data;
send, after sending the data request command, a data read command for reading the requested data to the slave IC via the bidirectional data line;
measure a duration of a deactivation of a clock line, wherein the clock line is deactivated by the slave IC based on the slave IC receiving the data read command; and
set a wait time between a next data request command and a next data read command according to the measured duration.
18 . The system as claimed in claim 17 , wherein the master IC is configured to send the data read command to the slave IC after a specified minimum data provision time has elapsed since a time at which the data request command is sent, and
wherein the master IC is configured to set the wait time between the next data request command and the next data read command according to the specified minimum data provision time and the measured duration.
19 . The system as claimed in claim 17 , wherein the master IC is further configured to:
maintain the wait time for a plurality of subsequent data request commands and next data read commands; and
determine an updated wait time based on maintaining the wait time for the plurality of subsequent data request command and next data read commands.
20 . The system as claimed in claim 17 , wherein the master IC is further configured to:
reduce the wait time between the data request command and the data read command until a renewed deactivation of the clock line is detected.