Systems and methods for source-independent quantum position verification

1 . A method, comprising:

receiving, by a first verifier electronic device, a request for position verification comprising a claimed position from a prover electronic device;

generating, by the first verifier electronic device, a first bitstring and a second bitstring;

sending, by the first verifier electronic device, the first bitstring and the second bitstring to a second verifier electronic device;

preparing, by the prover electronic device, a first quantum system and a second quantum system in an entangled state;

sending, by the prover electronic device, the first quantum system to the first verifier electronic device, and keeping the second quantum system in quantum memory;

computing, by the first verifier electronic device, a basis for the first quantum system using an evaluation function, the first bitstring, and the second bitstring;

measuring, by the first verifier electronic device, the first quantum system using the basis, resulting in a first measurement outcome;

sending, by the first verifier electronic device, the first bitstring to the prover electronic device, and sending, by the second verifier electronic device, the second bitstring to the prover electronic device, wherein the first bitstring and the second bitstring are sent to arrive at the claimed position at the same time;

computing, by the prover electronic device, the basis using the evaluation function, the first bitstring, and the second bitstring and measuring the second quantum system using the basis, resulting in a second measurement outcome;

sending, by the prover electronic device, a first response comprising the second measurement outcome to the first verifier electronic device, and a second response comprising the second measurement outcome to the second verifier electronic device;

confirming, by the first verifier electronic device and the second verifier electronic device, that the first response and the second response were received within an expected time window, wherein the expected time window is based on the claimed position of the prover electronic device; and

rejecting, by the first verifier electronic device, the request in response to the first response or the second response being invalid or the first response and the second response being received outside of the expected time window.

2 . The method of claim 1 , wherein the first response or the second response is invalid in response to a score or an error rate being outside of a tolerance value.

3 . The method of claim 1 , further comprising:

publicly sharing, by the first verifier electronic device, the evaluation function with the prover electronic device.

4 . The method of claim 1 , wherein the first quantum system and the second quantum system are prepared in a Bell state.

5 . The method of claim 1 , wherein a source of the first quantum system and the second quantum system comprises a spontaneous parametric down-conversion.

6 . The method of claim 1 , wherein the quantum memory comprises a delay line.

7 . The method of claim 1 , wherein the expected time window is configurable based on a desired security level.

8 . A system, comprising:

one or more hardware processors;

a first verifier electronic device;

a second verifier electronic device; and

a prover electronic device;

wherein:

the prover electronic device is configured to send a request for position verification comprising a claimed position to the first verifier electronic device;

the first verifier electronic device is configured to generate a first bitstring and a second bitstring;

the first verifier electronic device is configured to send the first bitstring and the second bitstring to a second verifier electronic device;

the prover electronic device is configured to prepare a first quantum system and a second quantum system in an entangled state;

the prover electronic device is configured to send the first quantum system to the first verifier electronic device, and to keep the second quantum system in quantum memory;

the first verifier electronic device is configured to compute a basis for the first quantum system using an evaluation function, the first bitstring, and the second bitstring;

the first verifier electronic device is configured to measure the first quantum system using the basis, resulting in a first measurement outcome;

the first verifier electronic device is configured to send the first bitstring to the prover electronic device;

the second verifier electronic device is configured to send the second bitstring to the prover electronic device, wherein the first bitstring and the second bitstring are sent to arrive at the claimed position at the same time;

the prover electronic device is configured to compute the basis using the evaluation function, the first bitstring, and the second bitstring;

the prover electronic device is configured to measure the second quantum system using the basis, resulting in a second measurement outcome;

the prover electronic device is configured to send a first response comprising the second measurement outcome to the first verifier electronic device, and a second response comprising the second measurement outcome to the second verifier electronic device;

the first verifier electronic device and the second verifier electronic device are configured to confirm that the first response and the second response were received within an expected time window, wherein the expected time window is based on the claimed position of the prover electronic device; and

the first verifier electronic device is configured to reject the request in response to the first response or the second response being invalid or the first response and the second response being received outside of the expected time window.

9 . The system of claim 8 , wherein the first response or the second response is invalid in response to a score or an error rate being outside of a tolerance value.

10 . The system of claim 8 , wherein the first verifier electronic device is configured to publicly share the evaluation function with the prover electronic device.

11 . The system of claim 8 , wherein the first quantum system and the second quantum system are prepared in a Bell state.

12 . The system of claim 8 , further comprising:

a spontaneous parametric down-conversion source of the first quantum system and the second quantum system.

13 . The system of claim 8 , wherein the quantum memory comprises a delay line.

14 . The system of claim 8 , wherein the expected time window is based on a desired security level.

15 . A non-transitory computer readable storage medium, including instructions stored thereon, which when read and executed by one or more computer processors, cause the one or more computer processors to perform steps comprising:

receiving a request for position verification comprising a claimed position from a prover electronic device;

generating a first bitstring and a second bitstring;

sending the first bitstring and the second bitstring to a second verifier electronic device;

receiving a first quantum system from the prover electronic device, wherein the first quantum system and a second quantum system were prepared in an entangled state;

computing a basis for the first quantum system using an evaluation function, the first bitstring, and the second bitstring;

measuring the first quantum system using the basis, resulting in a first measurement outcome;

sending the first bitstring to the prover electronic device, wherein the second verifier electronic device sends the second bitstring to the prover electronic device, and the first bitstring and the second bitstring are sent to arrive at the claimed position at the same time;

receiving, from the prover electronic device, a first response comprising a second measurement outcome, wherein comprising the second measurement outcome comprises a measurement of the second quantum system using the basis that was computed using the evaluation function, the first bitstring, and the second bitstring;

confirming that the first response and a second response received by the second verifier electronic device were received within an expected time window, wherein the expected time window is based on the claimed position of the prover electronic device; and

rejecting request in response to the first response or the second response being invalid or the first response and the second response being received outside of the expected time window.

16 . The non-transitory computer readable storage medium of claim 15 , wherein the first response or the second response is invalid in response to a score or an error rate being outside of a tolerance value.

17 . The non-transitory computer readable storage medium of claim 15 , further including instructions stored thereon, which when read and executed by the one or more computer processors, cause the one or more computer processors to perform steps comprising:

publicly sharing the evaluation function with the prover electronic device.

18 . The non-transitory computer readable storage medium of claim 15 , wherein the first quantum system and the second quantum system are prepared in a Bell state.

19 . The non-transitory computer readable storage medium of claim 15 , wherein a source of the first quantum system and the second quantum system comprises a spontaneous parametric down-conversion.

20 . The non-transitory computer readable storage medium of claim 15 , wherein the expected time window wherein the expected time window is based on a desired security level.