IP Library Granted Patent US 12675986
Granted Patent B2
US 12675986 · App. 18/282,049 · Granted Jul 7, 2026

Reconfigurable, hyperdimensional neural network architecture

Inventors: Aswin Nadamuni Raghavan (Pennington, NJ); Michael R. Piacentino (Robbinsville, NJ); Michael A. Isnardi (Plainsboro, NJ); Indhumathi Kandaswamy (Yardley, PA); Saurabh Farkya (Princeton, NJ); David Chao Zhang (Belle Mead, NJ); Gooitzen S. Van Der Wal (Hopewell, NJ); Zachary Daniels (Robinsville, NJ); Yuzheng Zhang (Princeton, NJ)
Assignee: SRI International
G06V10/82G06N3/0442G06V10/764
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Quick Facts
Patent No.
US 12675986
App. No.
18/282,049
Granted
Jul 7, 2026
Kind
B2
Abstract

Method and apparatus for processing data using a reconfigurable, hyperdimensional neural network architecture comprising a feature extractor and a classifier. The feature extractor comprises a neural network for encoding input information into hyperdimensional (HD) vectors and extracting at least one particular HD vector representing at least one feature within the input information, wherein the neural network comprises no more than one multiply and accumulate operator. The classifier is coupled to the feature extractor for classifying the at least one particular HD vector to produce an indicium of classification for the at least one particular HD vector and wherein the classifier does not comprise any multiply and accumulate operators.

Claims (54)

1 . An apparatus configured to process data using machine learning comprising:

a feature extractor comprising a neural network configured to encode input information into hyperdimensional (HD) vectors and extract at least one particular HD vector representing at least one feature within the input information, wherein the neural network comprises no more than one multiply and accumulate operator at each layer of the neural network; and

a classifier, coupled to the feature extractor, configured to classify the at least one particular HD vector to produce an indicium of classification for the particular HD vector and wherein the classifier does not comprise any multiply and accumulate operators.

2 . The apparatus of claim 1 , wherein the input information is video information.

3 . The apparatus of claim 1 , wherein the neural network comprises a plurality of artificial neurons, where each artificial neuron comprises a shift and accumulate operator.

4 . The apparatus of claim 1 , wherein the feature extractor comprises at least one long short-term memory (LSTM) cell, where the LSTM does not contain any multiply and accumulate operators.

5 . The apparatus of claim 1 , further comprising training the neural network separately from training of the classifier.

6 . The apparatus of claim 1 , further comprising a field programmable gate array or application specific integrated circuit having at least one processor and a memory, wherein the memory stores computer code to implement the feature extractor and classifier.

7 . A method for processing information comprising:

receiving input information;

extracting at least one hyperdimensional (HD) vector representing at least one feature from the input information using a neural network, where the neural network comprises no more than one multiply and accumulate operator at each layer of the neural network; and

classifying the at least one HD vector using a classifier, where the classifier does not comprise any multiply and accumulate operators.

8 . The method of claim 7 , wherein the input information is video.

9 . The method of claim 7 , wherein the neural network comprises a plurality of artificial neurons, where each artificial neuron comprises a shift and accumulate operator.

10 . The method of claim 7 , wherein extracting comprises utilizing at least one long short-term memory (LSTM) cell, where the LSTM does not contain any multiply and accumulate operators.

11 . The method of claim 7 , further comprising training the neural network separately from training of the classifier.

12 . The method of claim 11 , further comprising:

training the neural network of the feature extractor;

fixing weights and biases of the neural network; and

training the classifier while the weights and biases are fixed in the neural network.

13 . The method of claim 12 , wherein training the first neural network comprises:

coupling the neural network of the feature extractor to a training neural network;

training the neural network of the feature extractor and training neural network;

and

coupling the neural network of the feature extractor to the classifier.

14 . The method of claim 13 , further comprising reconfiguring the classifier to recognize at least one additional classification, where reconfiguring comprises applying a new feature to the classifier, labelling a new classification for the new feature, and training the classifier to classify HD vectors using the new classification.

15 . The method of claim 14 , further comprising receiving the new feature, the new classification, or both via federated learning.

16 . The method of claim 7 , wherein the method is performed by either a field programmable gate array or application specific integrated circuit.

17 . An apparatus comprising at least one processor and at least one non-transient computer readable media, where the at least one non-transient computer readable media stores instructions that, when executed by the at least one processor, causes the apparatus to perform operations comprising:

receiving input information;

extracting at least one hyperdimensional (HD) vector representing at least one feature from the input information using a neural network, where the neural network comprises no more than one multiply and accumulate operator at each layer of the first neural network; and

classifying the at least one HD vector using a classifier to produce an indicium of classification for the at least one HD vector, where the classifier does not comprise any multiply and accumulate operators.

18 . The apparatus of claim 17 , wherein the input information is video.

19 . The apparatus of claim 17 , wherein the neural network comprises a plurality of artificial neurons, where each artificial neuron comprises a shift and accumulate operator.

20 . The apparatus of claim 17 , wherein extracting comprises utilizing at least one long short-term memory (LSTM) cell, where the LSTM cell does not contain any multiply and accumulate operators.

21 . The apparatus of claim 17 , further comprising training the neural network separately from training of the classifier.

22 . The apparatus of claim 21 , performing operations further comprising:

training the neural network;

fixing weights and biases of the neural network; and

training the classifier while the weights and biases are fixed in the neural network.

23 . The apparatus of claim 22 , wherein training the neural network comprises:

coupling the neural network of the feature extractor to a training neural network;

training the neural network of the feature extractor and training neural network;

and

coupling the neural network to the classifier.

24 . The apparatus of claim 23 , further comprising reconfiguring classifier to recognize at least one additional classification, where reconfiguring comprises applying a new feature to the classifier, labelling a new classification for the new feature, and training the classifier to classify HD vectors using the new classification.

25 . The apparatus of claim 24 , further comprising receiving the new feature, the new classification, or both via federated learning.

26 . The apparatus of claim 17 , comprises a field programmable gate array or application specific integrated circuit.

27 . An apparatus comprising a field programmable gate array or an application specific integrated circuit configured to process data using machine learning comprising:

a feature extractor comprising a neural network configured to encode input information into hyperdimensional (HD) vectors and extract at least one particular HD vector representing at least one feature within the input information, wherein the neural network comprises shift and accumulate operators using power of two weights, look up tables, and exclusive OR logic using no more than one multiply and accumulate operator in each layer of the neural network; and

a classifier, coupled to the feature extractor, configured to classify the at least one particular HD vector and wherein the classifier comprises shift and accumulate operators using power of two weights, look up tables, and exclusive OR logic without using any multiply and accumulate operators.

28 . The apparatus of claim 27 , wherein the input information is video.

29 . The apparatus of claim 27 , wherein the feature extractor comprises at least one long-short term memory (LSTM) cell, where the LSTM comprises shift and accumulate operators using power of two weights and look up tables for providing sigmoid and tanh functions.

30 . The apparatus of claim 27 , further comprising a process in memory (PIM) architecture.