Display apparatus and display system
A display apparatus includes a power control circuit and a timing control circuit that supplies a timing signal to a level shifter circuit. In response to reception of a control signal used to transition from a display mode to a pause mode from a host controller, the timing control circuit causes the level shifter circuit to stop outputting a gate signal by transmitting a pause signal to the power control circuit and stopping supplying the timing signal to the level shifter circuit. In response to reception of the pause signal, the power control circuit stops supplying at least part of power to be supplied to the display panel and the level shifter circuit while keeping supplying power to the timing control circuit.
1 . A display apparatus comprising:
a display panel including a common electrode and a gate line;
a display driving circuit that supplies the gate line of the display panel with a driving signal;
a timing control circuit that supplies the display panel with an image signal and the display driving circuit with a timing signal; and
a power control circuit that controls a power-on state and a power-off state on each of the display panel, the display driving circuit, and the timing control circuit,
wherein in response to reception of a control signal from a host controller, with the control signal used to transition the display panel from a display mode, that causes the display panel to perform displaying, to a pause mode, that causes the display panel to stop displaying, the timing control circuit:
transmits a pause signal to the power control circuit, and
causes the display driving circuit to stop supplying the driving signal to the display panel by stopping supplying the timing signal to the display driving circuit,
wherein the power control circuit comprises:
a timing control circuit power supply unit outputting a voltage to the timing control circuit;
a display driving circuit power supply unit outputting a voltage to the display driving circuit; and
a common electrode power supply unit outputting a voltage to the common electrode,
wherein in response to reception of the pause signal, the power control circuit stops the output of the voltage from the display driving circuit power supply unit and the voltage from the common electrode power supply unit while maintaining the output of the voltage from the timing control circuit power supply unit, and
wherein in response to the reception of a control signal used to transition from the pause mode to the display mode from the host controller, the timing control circuit:
stops transmitting the pause signal to the power control circuit, and
supplies the display driving circuit with the timing signal.
2 . A display system comprising:
a display apparatus including a display panel having a common electrode and a gate line; and
a host controller that transmits a first control signal and a second control signal to the display apparatus, with the first control signal used to transition the display panel from a display mode, that causes the display panel to perform displaying, to a pause mode, that causes the display panel to stop displaying, and with the second control signal used to transition the display panel from the pause mode to the display mode,
wherein the display apparatus includes:
a display driving circuit that supplies the gate line of the display panel with a driving signal;
a timing control circuit that supplies the display panel with an image signal and the display driving circuit with a timing signal; and
a power control circuit that controls a power-on state and a power-off state on each of the display panel, the display driving circuit, and the timing control circuit,
wherein the timing control circuit:
receives the first control signal from the host controller,
transmits the pause signal to the power control circuit, and
causes the display driving circuit to stop supplying the driving signal to the display panel by stopping supplying the timing signal to the display driving circuit,
wherein the power control circuit comprises:
a timing control circuit power supply unit outputting a voltage to the timing control circuit;
a display driving circuit power supply unit outputting a voltage to the display driving circuit; and
a common electrode power supply unit outputting a voltage to the common electrode,
wherein in response to reception of the pause signal, the power control circuit stops the output of the voltage from the display driving circuit power supply unit and the voltage from the common electrode power supply unit while maintaining the output of the voltage from supplying power to the timing control circuit power supply unit, and
wherein in response to reception of the second control signal from the host controller, the timing control circuit:
stops transmitting the pause signal to the power control circuit, and
supplies the display driving circuit with the timing signal.