IP Library Granted Patent US 12676294
Granted Patent B2
US 12676294 · App. 17/818,748 · Granted Jul 7, 2026

Wafer placement table

Inventors: Seiya Inoue (Handa-City, JP); Tatsuya Kuno (Nagoya-City, JP); Ikuhisa Morioka (Handa-City, JP)
Assignee: NGK INSULATORS, LTD.
H01J37/32724H10P72/72H10P72/722H10P72/7624H10P72/0432H10P72/0434H10P72/7616
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Quick Facts
Patent No.
US 12676294
App. No.
17/818,748
Granted
Jul 7, 2026
Kind
B2
Abstract

A wafer placement table includes a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode, a cooling base having a refrigerant flow channel, and a bonding layer that bonds the ceramic base with the cooling base, wherein in an area that overlaps the wafer placement surface in plan view of the refrigerant flow channel, a distance from a ceiling surface of the refrigerant flow channel to the wafer placement surface at a most downstream part of the refrigerant flow channel is shorter than the distance at a most upstream part of the refrigerant flow channel.

Claims (24)

1 . A wafer placement table comprising:

a ceramic base having a wafer placement surface on its top surface where a wafer is able to be placed and incorporating an electrode;

a cooling base having a refrigerant flow channel;

a bonding layer that bonds the ceramic base with the cooling base; and

two or more holes extending through the cooling base in an up and down direction, wherein

in an area that overlaps the wafer placement surface in plan view of the refrigerant flow channel, a distance from a ceiling surface of the refrigerant flow channel to the wafer placement surface at a most downstream part of the refrigerant flow channel overlapping the wafer placement surface is shorter than the distance at a most upstream part of the refrigerant flow channel overlapping the wafer placement surface; and

wherein the refrigerant flow channel is a single-layered structure with a single inlet and a single outlet; and

wherein the refrigerant flow channel is formed such that a distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface in an area directly adjacent to each of the two or more holes is shorter than the distance in an area not directly adjacent to each of the two or more holes; and

wherein the distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface in the area directly adjacent to each of the two or more holes is 50% to 90% of the distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface at the most upstream part.

2 . The wafer placement table according to claim 1 , wherein

a distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface gradually reduces from the most upstream part of the refrigerant flow channel toward the most downstream part.

3 . The wafer placement table according to claim 1 ,

wherein

a distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface is adjusted by at least one of a distance from the ceiling surface of the refrigerant flow channel to a top surface of the cooling base, a thickness of the bonding layer, or a thickness of the ceramic base.

4 . The wafer placement table according to claim 1 ,

wherein

a distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface at the most downstream part is 50% to 90% of a distance from the ceiling surface of the refrigerant flow channel to the wafer placement surface at the most upstream part.

5 . The wafer placement table according to claim 1 ,

wherein

the cooling base is made of a metal matrix composite material, and

the bonding layer is a metal bonding layer.

6 . The wafer placement table according to claim 1 ,

wherein

the two or more holes are selected from the group consisting of terminal holes, lift pin holes, gas holes and combinations thereof.