IP Library Granted Patent US 12676538
Granted Patent B2
US 12676538 · App. 18/506,955 · Granted Jul 7, 2026

Circuits and methods for operation of asymmetric half-bridge flyback converter with ZVS windings

Inventors: Xiucheng Huang (Torrance, CA); Weijing Du (Torrance, CA); Yun Zhou (Shenzhen, CN); Guoxing Zhang (Shenzhen, CN)
Assignee: Navitas Semiconductor Limited
H02M1/0006H02M1/0058H02M3/01H02M3/33523H02M3/33571
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Quick Facts
Patent No.
US 12676538
App. No.
18/506,955
Granted
Jul 7, 2026
Kind
B2
Abstract

A circuit is disclosed. The circuit includes a transformer having a primary winding extending between a first terminal and a second terminal, and further including a secondary winding extending between a third terminal and a first output terminal; a first switch having a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal coupled to the second terminal and the first source terminal coupled to a power source; a second switch having a second gate terminal, a second source terminal and a second drain terminal, the second source terminal coupled to the second terminal, and the second drain terminal coupled to the power source; and a third switch having a third gate terminal, a third source terminal and a third drain terminal, the third source terminal coupled to the third terminal and the third drain terminal coupled to a second output terminal.

Claims (38)

1 . A circuit comprising:

a transformer including a primary winding extending between a first terminal and a second terminal, and further including a secondary winding extending between a third terminal and a first output terminal;

a first switch having a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal coupled to the second terminal and the first source terminal coupled to a power source;

a second switch having a second gate terminal, a second source terminal and a second drain terminal, the second source terminal coupled to the second terminal, and the second drain terminal coupled to the power source;

a third switch having a third gate terminal, a third source terminal and a third drain terminal, the third source terminal coupled to the third terminal and the third drain terminal coupled to a second output terminal;

a first winding having a winding direction that is opposite to that of the primary winding and being electromagnetically coupled to the primary winding;

a fourth switch having a fourth gate terminal, a fourth source terminal and a fourth drain terminal, wherein the fourth drain terminal is coupled to the first winding; and

a load coupled between the first output terminal and the second output terminal, the load having an output voltage across it;

wherein when the output voltage is high, an on-time of the fourth switch is decreased and when the output voltage is low, the on-time of the fourth switch is increased.

2 . The circuit of claim 1 , further comprising a second winding having a winding direction that is opposite to that of the primary winding, the second winding coupled to the first winding.

3 . The circuit of claim 1 , wherein the fourth switch is arranged to be turned-on prior to a first switch turn-on.

4 . The circuit of claim 3 , wherein the fourth switch is a gallium nitride (GaN) based transistor.

5 . The circuit of claim 1 , wherein the first winding is arranged to have a number of turns that is greater than a product of number of turns of the secondary winding and voltage across the first winding divided by the output voltage.

6 . The circuit of claim 1 , wherein the fourth switch is a silicon based transistor.

7 . The circuit of claim 1 , wherein the secondary winding has a winding direction that is opposite to that of the primary winding.

8 . A circuit comprising:

a transformer including a primary winding extending between a first terminal and a second terminal, and further including a secondary winding extending between a third terminal and a first output terminal;

a first switch having a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal coupled to the second terminal and the first source terminal coupled to a power source;

a second switch having a second gate terminal, a second source terminal and a second drain terminal, the second source terminal coupled to the second terminal, and the second drain terminal coupled to the power source;

a third switch having a third gate terminal, a third source terminal and a third drain terminal, the third source terminal coupled to the third terminal and the third drain terminal coupled to a second output terminal;

a first winding having a winding direction that is opposite to that of the primary winding and being electromagnetically coupled to the primary winding;

a low-side winding having a winding direction that is opposite to that of the primary winding, the low-side winding coupled to the first winding; and

a high-side winding having a winding direction that is opposite to that of the primary winding, the high-side winding coupled to the first winding.

9 . The circuit of claim 8 , further comprising a fourth switch having a fourth gate terminal, a fourth source terminal and a fourth drain terminal, wherein the fourth drain terminal is coupled to the first winding.

10 . The circuit of claim 9 , wherein the fourth switch is arranged to be turned-on prior to a first switch turn-on.

11 . The circuit of claim 8 , wherein the secondary winding has a winding direction that is opposite to that of the primary winding.

12 . A circuit comprising:

a transformer including a primary winding extending between a first terminal and a second terminal, and further including a secondary winding extending between a third terminal and a first output terminal;

a first switch having a first gate terminal, a first source terminal and a first drain terminal, the first drain terminal coupled to the second terminal and the first source terminal coupled to a power source;

a second switch having a second gate terminal, a second source terminal and a second drain terminal, the second source terminal coupled to the second terminal, and the second drain terminal coupled to the power source;

a third switch having a third gate terminal, a third source terminal and a third drain terminal, the third source terminal coupled to the third terminal and the third drain terminal coupled to a second output terminal;

a low-side winding having a winding direction that is opposite to that of the primary winding and being electromagnetically coupled to the primary winding;

a high-side winding having a winding direction that is opposite to that of the primary winding, the high-side winding coupled to the low-side winding; and

a second winding having a winding direction that is opposite to that of the primary winding.

13 . The circuit of claim 12 , further comprising a fourth switch having a fourth gate terminal, a fourth source terminal and a fourth drain terminal, wherein the fourth drain terminal is coupled to the high-side winding.

14 . The circuit of claim 13 , wherein the fourth switch is arranged to be turned-on prior to a first switch turn-on.

15 . The circuit of claim 13 , wherein the fourth switch is gallium nitride (GaN) based transistor.

16 . The circuit of claim 12 , wherein the first switch is GaN-based transistor.