IP Library Granted Patent US 12676545
Granted Patent B2
US 12676545 · App. 18/435,296 · Granted Jul 7, 2026

Detecting signals from cascode power devices

Inventor: Robert J. Mayell (Los Altos, CA)
Assignee: Power Integrations, Inc.
H02M1/088H02M1/0009H02M3/01H02M3/335H02M3/3353H02M3/33571H03K17/133
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Quick Facts
Patent No.
US 12676545
App. No.
18/435,296
Granted
Jul 7, 2026
Kind
B2
Abstract

Detecting signals from cascode power devices is described herein. By sensing a gate signal from the high-voltage device, drain waveform characteristics may be monitored. In this manner a power switch may be controlled to avail enhanced performance in a power converter comprising a cascode power device.

Claims (34)

1 . A power converter comprising:

a cascode power device comprising a first device and a second device electrically coupled in cascode to a switch node, the switch node configured to provide a switch node voltage according to a switching cycle;

a current sense element electrically coupled to a gate of the second device and configured to provide a sense signal in response toa signal at the gate of the second device, wherein the current sense element comprises a resistance electrically coupled between the gate of the second device and a source of the first device;

a switch driver configured to provide a gate drive signal to a gate of the first device in response to a drive signal;

a signal detection circuit configured to provide a state signal in response to the sense signal, wherein the signal detection circuit comprises a comparator configured to provide the state signal in response to a comparison of the sense signal with a reference; and

a break before make controller, wherein the break before make controller is configured to control the gate drive signal in response to the state signal and the drive signal such that the first device operates in an off state during a portion of the drive signal and transitions to an on state at a conclusion of the portion of the drive signal.

2 . The power converter of claim 1 , wherein the signal at the gate of the second device is a slew current.

3 . The power converter of claim 1 , wherein the source of the first device is electrically coupled to ground and a drain of the second device is electrically coupled to the switch node.

4 . The power converter of claim 1 , wherein the source of the first device is electrically coupled to the switch node and a drain of the second device is electrically coupled to a supply node.

5 . The power converter of claim 1 , wherein the comparator is a voltage comparator and the reference is a voltage.

6 . The power converter of claim 1 , wherein the comparator is a current comparator and the reference is a current.

7 . The power converter of claim 1 , wherein the first device is an enhancement mode n-channel field effect transistor (NFET) and the second device is a depletion mode NFET.

8 . The power converter of claim 7 , wherein the depletion mode NFET is a depletion mode gallium nitride (GaN) NFET.

9 . The power converter of claim 1 , wherein the drive signal includes an oscillation of at least one of a voltage and a current.

10 . The power converter of claim 9 , wherein the switch driver selectively provides the gate drive signal based at least in part on the oscillation.

11 . The power converter of claim 10 , wherein the switch driver selectively provides the gate drive signal at an interval determined at least in part by a frequency of the oscillation.

12 . A power converter, comprising:

a first power circuit electrically coupled to an input of the power converter, wherein the first power circuit comprises:

a first transistor;

a second transistor electrically connected in cascode with the first transistor; and

a current sense element configured to provide a sense signal in response to a signal at a gate of the second transistor, wherein the current sense element comprises a resistance electrically coupled between a source of the first transistor and the gate of the second transistor;

a second power circuit, electrically coupled between electrical ground and the first power circuit at a switch node, the switch node configured to provide a switch node voltage according to a switching cycle;

a driver circuit electrically coupled to a first control connection of the first power circuit and to a second control connection of the second power circuit, wherein the driver circuit is configured to selectively control the first power circuit and the second power circuit in response to a drive signal;

a detection circuit configured to provide a state signal in response to the sense signal, wherein the detection circuit comprises a comparator configured to provide the state signal in response to a comparison of the sense signal with a reference; and

a break before make controller, wherein the break before make controller is configured to control a gate drive signal provided to a gate of the first transistor, via the first control connection of the first power circuit, in response to the state signal and the drive signal such that the first transistor operates in an off state during a portion of the drive signal and transitions to an on state at a conclusion of the portion of the drive signal.

13 . The power converter of claim 12 , wherein the first transistor is an enhancement mode n-channel field effect transistor (NFET) and the second transistor is a depletion mode NFET.

14 . The power converter of claim 12 , wherein the second power circuit includes a third transistor and a fourth transistor electrically connected in cascode.

15 . The power converter of claim 14 , wherein the third transistor is an enhancement mode n-channel field effect transistor (NFET) and the fourth transistor is a depletion mode NFET.

16 . The power converter of claim 15 , wherein the switch node is electrically coupled to a load of the power converter.

17 . The power converter of claim 12 , wherein the signal at the gate of the second transistor is a slew current.

18 . The power converter of claim 12 , wherein the drive signal includes an oscillation of at least one of a voltage and a current.

19 . The power converter of claim 18 , wherein the driver circuit selectively controls at least one of the first power circuit and the second power circuit based at least in part on the oscillation.

20 . The power converter of claim 19 , wherein the driver circuit selectively controls at least one of the first power circuit and the second power circuit at an interval determined at least in part by a frequency of the oscillation.

21 . The power converter of claim 12 , wherein the driver circuit further comprises circuitry configured to selectively control the second power circuit with the second control connection to change the operational state of the second power circuit at the conclusion of the portion of the drive signal.