IP Library › Granted Patent US 12676606
Granted Patent B2
US 12676606 · App. 17/993,412 · Granted Jul 7, 2026

Transistor over-voltage protection

Inventors: Dharmaray Nedalgi (Bangalore, IN); Lavanya Manohar Nirikhi (Bangalore, IN)
Assignee: Intel Corporation
H03K17/0822H03K2217/0081
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Quick Facts
Patent No.
US 12676606
App. No.
17/993,412
Granted
Jul 7, 2026
Kind
B2
Abstract

An apparatus comprises a first supply node to provide a first voltage and a second supply node to provide a second voltage lower than the first voltage. First and second transistors, of a first conductivity type, are coupled in series at a first common node, wherein the first transistor is coupled to the first supply node, and the second transistor is coupled to an output node. Third and fourth transistors, of a second conductivity type, coupled in series at a second common node, wherein the fourth transistor is coupled to a third node that is to provide a third voltage, and the third transistor is coupled to the output node. First impedance circuitry is coupled to a gate terminal of the second transistor, the second supply node, and to a gate terminal of the first transistor.

Claims (47)

1 . An apparatus comprising:

a first supply node to provide a first voltage;

a second supply node to provide a second voltage lower than the first voltage;

a first transistor and a second transistor coupled in series at a first common node, wherein the first transistor and the second transistor are of a first conductivity type, the first transistor is coupled to the first supply node, and the second transistor is coupled to an output node;

a third transistor and a fourth transistor coupled in series at a second common node, wherein the fourth transistor and the third transistor are of a second conductivity type, the fourth transistor is coupled to a third node that is to provide a third voltage, and the third transistor is coupled to the output node;

first impedance circuitry coupled to a gate terminal of the second transistor, the second supply node, and to a gate terminal of the first transistor; and

a first capacitor coupled between a gate terminal of the first transistor and the gate terminal of the second transistor.

2 . The apparatus of claim 1 , wherein the first impedance circuitry comprises:

a fifth transistor of the second conductivity type coupled to the gate of the second transistor and the second supply node, wherein a gate terminal of the fifth transistor is coupled to the gate terminal of the first transistor.

3 . The apparatus of claim 2 , wherein the first impedance circuitry comprises:

a sixth transistor of the second conductivity type coupled to the gate terminal of the second transistor and the second supply node, wherein a gate terminal of the sixth transistor is coupled to the first common node.

4 . The apparatus of claim 3 , further comprising second impedance circuitry coupled to a gate terminal of the third transistor, the second supply node, and to a gate terminal of the fourth transistor, wherein the second circuitry comprises:

a seventh transistor of the first conductivity type coupled to the gate of the third transistor and the second supply node, wherein a gate terminal of the seventh transistor is coupled to a gate terminal of the fourth transistor; and

an eighth transistor of the first conductivity type coupled to the gate terminal of the third transistor and the second supply node, wherein a gate terminal of the eighth transistor is coupled to the second common node.

5 . The apparatus of claim 1 , further comprising:

a first feedback transistor of the first conductivity type coupled to the first common node and to the second supply node, wherein a gate terminal of the first feedback transistor is coupled to the output node.

6 . The apparatus of claim 1 , wherein the first capacitor comprises features of a first size, the second transistor comprises features of a second size, and the first size is proportional to the second size.

7 . The apparatus of claim 1 , wherein a gate terminal of the first transistor is coupled to a first input signal and a gate terminal of the fourth transistor is coupled to a second input signal.

8 . The apparatus of claim 1 , wherein the second transistor is a fin field effect transistor.

9 . An apparatus comprising:

a first supply node to provide a first voltage;

a second supply node to provide a second voltage lower than the first voltage;

a first transistor and a second transistor coupled in series at a first common node, wherein the first transistor and the second transistor are of a first conductivity type, the first transistor is coupled to the first supply node, and the second transistor is coupled to an output node;

a third transistor and a fourth transistor coupled in series at a second common node, wherein the fourth transistor and the third transistor are of a second conductivity type, the fourth transistor is coupled to a third node that is to provide a third supply reference voltage, and the third transistor is coupled to the output node;

first impedance circuitry coupled to a gate terminal of the second transistor and the second supply node, and a gate terminal of the first transistor;

a first feedback transistor of the first conductivity type coupled to the first common node and to the second supply node, and comprising a gate terminal coupled to the output node; and

a first capacitor coupled between a gate terminal of the first transistor and the gate terminal of the second transistor.

10 . The apparatus of claim 9 , wherein the first impedance circuitry comprises one of a pass-gate circuit or a resistor.

11 . The apparatus of claim 9 , wherein the first impedance circuitry comprises:

a fifth transistor of the second conductivity type coupled to the gate of the second transistor and the second supply node, wherein a gate terminal of the fifth transistor is coupled to the gate terminal of the first transistor; and

a sixth transistor of the second conductivity type coupled to the gate terminal of the second transistor and the second supply node, wherein a gate terminal of the sixth transistor is coupled to the first common node.

12 . The apparatus of claim 9 , wherein the first capacitor comprises features of a first size, the second transistor comprises features of a second size, and the first size is proportional to the second size.

13 . The apparatus of claim 9 , wherein a gate terminal of the first transistor is coupled to a first input signal and a gate terminal of the fourth transistor is coupled to a second input signal.

14 . An apparatus comprising:

a first supply node to provide a first voltage;

a second supply node to provide a second voltage lower than the first voltage;

a first stack of transistors, of a first conductivity type, comprising a first transistor and a second transistor coupled in series at a first common node, wherein the first transistor is coupled to the first supply node and a gate terminal of the first transistor is coupled to a first input signal;

a second stack of transistors, of a second conductivity type, comprising a third transistor and a fourth transistor coupled in series at a second common node, wherein the fourth transistor is coupled to a third node that is to provide a third voltage and a gate terminal of the fourth transistor is coupled to a second input signal, wherein the second stack of transistor is coupled in series to the first stack of transistors at an output node;

first impedance circuitry, coupled to a gate terminal of the second transistor and the second supply node, controllable by the first input signal; and

a first capacitor coupled between a gate terminal of the first transistor and the gate terminal of the second transistor.

15 . The apparatus of claim 14 , wherein the first stack of transistors further comprises a fifth transistor coupled in series at a third common node with the second transistor, and the second stack of transistors further comprises a sixth transistor coupled in series at a fourth common node with the third transistor.

16 . The apparatus of claim 15 , wherein the first impedance circuitry comprises:

a seventh transistor of the second conductivity type coupled to the gate of the second transistor and the second supply node, wherein a gate terminal of the seventh transistor is coupled to the gate terminal of the first transistor; and

an eighth transistor of the second conductivity type coupled to the gate terminal of the second transistor and the second supply node, wherein a gate terminal of the eighth transistor is coupled to the first common node.

17 . The apparatus of claim 14 , wherein the first impedance circuitry is further controllable by a voltage at the first common node.

18 . The apparatus of claim 14 , further comprising:

a first feedback transistor of the first conductivity type coupled to the first common node and to the second supply node, wherein a gate terminal of the first feedback transistor is coupled to the output node.