Digital logic compatible inputs in compound semiconductor circuits
An apparatus includes a device comprising a semiconductor junction configured to generate a reference voltage, a voltage divider circuit, a comparator circuit, and a first output circuit. The voltage divider circuit may be configured to generate a first predetermined threshold voltage in response to the reference voltage. The comparator circuit may be configured to generate a first intermediate signal in response to a comparison of the first predetermined threshold voltage and an input signal. The first output circuit may be configured to generate a first output signal in response to the first intermediate signal.
1 . A method of generating an internal control signal in a compound semiconductor integrated circuit comprising a compound semiconductor material, said method comprising:
generating, in the compound semiconductor integrated circuit, a bandgap voltage using a semiconductor junction formed in said compound semiconductor material, the bandgap voltage having a voltage value corresponding to said compound semiconductor material;
generating, in the compound semiconductor integrated circuit, a first predetermined threshold voltage by providing the bandgap voltage, from a node between a terminal of the semiconductor junction and a positive power supply, to a voltage divider and setting an output of the voltage divider as the first predetermined threshold voltage, the first predetermined threshold voltage corresponding to a threshold voltage value disposed between a range of voltage values corresponding to a logical high state and a range of voltage values corresponding to a logical low state;
obtaining, in the compound semiconductor integrated circuit, an input signal from a digital control circuit external to the compound semiconductor integrated circuit, said input signal having a voltage outside of:
the range of voltage values corresponding to said logical low state; and
the range of voltage values corresponding to said logical high state;
generating, in the compound semiconductor integrated circuit, a first intermediate signal based on a comparison of said first predetermined threshold voltage and said voltage of said input signal; and
generating, in the compound semiconductor integrated circuit, a first output signal based on said first intermediate signal, wherein said first output signal has a first level when said voltage of said input signal is less than said first predetermined threshold voltage and a second level when said voltage of said input signal is greater than said first predetermined threshold voltage,
wherein the first output signal is configured to control an internal circuitry of the compound semiconductor integrated circuit.
2 . The method according to claim 1 , further comprising:
generating a second intermediate signal based on the comparison of the first predetermined threshold voltage and the voltage of the input signal; and
generating a second output signal based on the second intermediate signal.
3 . The method according to claim 2 , wherein:
the second intermediate signal is a complement of the first intermediate signal.
4 . The method according to claim 2 , wherein:
the second output signal is a complement of the first output signal.
5 . The method according to claim 1 , wherein said compound semiconductor material comprises a III-V compound semiconductor material.
6 . The method according to claim 1 , wherein said compound semiconductor material comprises at least one of a gallium arsenide alloy, a gallium nitride alloy, an indium phosphide alloy, an indium gallium phosphide alloy, a silicon carbide alloy.
7 . The method according to claim 1 , wherein said semiconductor junction comprises at least one of a diode junction, a transistor junction, and a parasitic junction.
8 . The method according to claim 1 , wherein said first predetermined threshold voltage is selected to be compliant with one or more digital logic standards.
9 . The method according to claim 1 , wherein said first predetermined threshold voltage is selected to be compliant with standard complementary metal-oxide-semiconductor (CMOS) logic levels.
10 . The method according to claim 9 , wherein said bandgap voltage has a value corresponding to a bandgap of said compound semiconductor material.
11 . The method according to claim 9 , wherein said bandgap voltage is substantially stable over process, voltage and temperature (PVT) corners of said compound semiconductor material.
12 . The method according to claim 1 , wherein generating said first predetermined threshold voltage based on said bandgap voltage comprises generating said first predetermined threshold voltage from said bandgap voltage using the voltage divider.
13 . The method according to claim 1 , wherein said digital control circuit comprises a semiconductor integrated circuit that is formed of a different material than said compound semiconductor integrated circuit.