IP Library Granted Patent US 12676621
Granted Patent B2
US 12676621 · App. 18/604,828 · Granted Jul 7, 2026

Signal oscillation circuit with adaptive tuning for tail filters

Inventors: Alessio Santiccioli (San Diego, CA); Mario Mercandelli (Carlsbad, CA); Giovanni Marucci (San Diego, CA); Dongmin Park (San Diego, CA); Yiwu Tang (San Diego, CA)
Assignee: Qualcomm Incorporated
H03L7/093H03L7/0891H03L7/097
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Quick Facts
Patent No.
US 12676621
App. No.
18/604,828
Granted
Jul 7, 2026
Kind
B2
Abstract

Techniques and apparatus for oscillating signal generation using a signal oscillation circuit capable of adaptively tuning one or more tail filters. An example signal oscillation circuit generally includes a voltage-controlled oscillator (VCO) that includes a VCO core and a first tail filter coupled to the VCO core, the first tail filter including a tunable component, a logic circuit including a first output coupled to a control input of the tunable component of the first tail filter, and a first signal converter including an input coupled to a second output of the logic circuit and including an output coupled to a node of the VCO.

Claims (51)

1 . A signal oscillation circuit comprising:

a voltage-controlled oscillator (VCO) comprising:

a VCO core with a tunable resonant circuit; and

a first tail filter coupled to the VCO core, the first tail filter including a tunable component;

a logic circuit including a first output coupled to a control input of the tunable component of the first tail filter;

a first signal converter including an input coupled to a second output of the logic circuit and including an output coupled to a node of the VCO; and

a second signal converter including an output coupled to an input of the logic circuit, wherein the second signal converter comprises an analog-to-digital converter (ADC) or a time-to-digital converter (TDC).

2 . The signal oscillation circuit of claim 1 , further comprising a phase detector including an output coupled to the tunable resonant circuit and to an input of the second signal converter.

3 . The signal oscillation circuit of claim 2 , wherein the signal oscillation circuit comprises an analog phase-locked loop and wherein the third second signal converter comprises the ADC.

4 . The signal oscillation circuit of claim 3 , further comprising a loop filter, wherein:

the phase detector includes a first input coupled to a reference node and includes a second input coupled to an output of the VCO;

the loop filter includes an input coupled to the output of the phase detector and includes an output coupled to a control input of the VCO core; and

the output of the phase detector is further coupled to an input of the ADC.

5 . The signal oscillation circuit of claim 3 , wherein the ADC is a 1 -bit ADC.

6 . The signal oscillation circuit of claim 2 , wherein the signal oscillation circuit comprises a digital phase-locked loop and wherein the third second signal converter comprises the TDC.

7 . The signal oscillation circuit of claim 6 , further comprising:

a digital loop filter including an input coupled to an output of the TDC; and

a digital-to-analog converter (DAC) including an input coupled to an output of the digital loop filter and including an output coupled to a control input of the VCO core, wherein the output of the TDC is further coupled to the input of the logic circuit, wherein an input of the TDC is coupled to the output of the phase detector, and wherein the phase detector includes a first input coupled to a reference node and includes a second input coupled to an output of the VCO.

8 . The signal oscillation circuit of claim 1 , wherein the first signal converter comprises a digital-to-analog converter (DAC).

9 . The signal oscillation circuit of claim 1 , wherein the first signal converter comprises a variable current source.

10 . The signal oscillation circuit of claim 1 , wherein the VCO core is a complementary VCO core, wherein the VCO further comprises a second tail filter coupled to the complementary VCO core, wherein the second tail filter comprises a tunable component, and wherein the first output of the logic circuit is further coupled to a control input of the tunable component of the second tail filter.

11 . The signal oscillation circuit of claim 1 , wherein the VCO core is a complementary VCO core, wherein the VCO further comprises a second tail filter coupled to the complementary VCO core, wherein the second tail filter comprises a tunable component, and wherein a third output of the logic circuit is coupled to a control input of the tunable component of the second tail filter.

12 . The signal oscillation circuit of claim 1 , wherein the logic circuit comprises a digital signal generator including an output coupled to the input of the first signal converter.

13 . The signal oscillation circuit of claim 12 , wherein the digital signal generator is configured to output a digital square wave.

14 . A signal oscillation circuit comprising:

a voltage-controlled oscillator (VCO) that includes a VCO core and a tail filter coupled to the VCO core, the tail filter including a tunable component;

a logic circuit including a first output coupled to a control input of the tunable component of the tail filter; and

a signal converter including an input coupled to a second output of the logic circuit and including an output coupled to a node of the VCO, wherein the logic circuit comprises:

a digital signal generator including an output coupled to the input of the signal converter; a delay element having an input coupled to the output of the digital signal generator;

a correlator including a first input coupled to an input of the logic circuit and including a second input coupled to an output of the delay element;

a first digital gain component including an input coupled to an output of the correlator and having a first gain;

a second digital gain component including an input coupled to the output of the correlator and having a second gain different than the first gain;

a multiplexer including a first input coupled to an output of the first digital gain component and including a second input coupled to an output of the second digital gain component; and

an accumulator including an input coupled to an output of the multiplexer and including an output coupled to the first output of the logic circuit.

15 . The signal oscillation circuit of claim 14 , wherein the logic circuit further comprises a third digital gain component including an input coupled to the output of the digital signal generator and including an output coupled to the second output of the logic circuit.

16 . A method of oscillating signal generation, the method comprising:

controlling an oscillating signal output by a voltage-controlled oscillator (VCO) using a tuning signal;

generating a training signal;

applying the training signal to a node of the VCO for upconversion by the VCO, wherein the training signal is different than the tuning signal;

determining a phase difference between a reference signal and a processed version of the oscillating signal; and

based on the phase difference, tuning at least one tail filter of the VCO, wherein the tuning at least reduces an upconversion gain of the VCO and wherein the tuning comprises:

converting the phase difference to a digital representation of the phase difference;

delaying the training signal to generate a delayed training signal;

correlating the delayed training signal with the digital representation of the phase difference to generate a correlation; and

tuning the at least one tail filter of the VCO based on the correlation.

17 . The method of claim 16 , wherein the training signal comprises a square wave current signal.

18 . The method of claim 16 , wherein generating the training signal comprises:

generating a digital training signal; and

converting the digital training signal to an analog training signal for the applying.

19 . The method of claim 18 , wherein converting the phase difference to the digital representation of the phase difference comprises using a 1 -bit analog-to-digital converter (ADC).

20 . The method of claim 16 , wherein the training signal comprises a current signal and wherein the applying comprises applying the current signal with a variable current source.