Duty-cycle invariant receiver and method for receiving

1 . A method for receiving a signal, the method comprising:

receiving a differential communication signal including a first component and a second component;

generating, with a comparator, a comparison signal by comparing the first component and the second component;

generating a single-ended communication signal by applying a debouncing time to the comparison signal; and

inverting a voltage offset of the comparator based on the single-ended communication signal.

2 . The method of claim 1 , wherein inverting the voltage offset of the comparator based on the single-ended communication signal further includes:

applying the first component of the differential communication signal to a first or a second of two inputs of the comparator based on the single-ended communication signal,

applying the second component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, and

inverting the comparison signal based on the single-ended communication signal.

3 . The method of claim 2 , wherein applying the first component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal further includes applying the first component of the differential communication signal to:

the first of the two inputs of the comparator when the single-ended communication signal is at a first logic value, and

the second of the two inputs of the comparator when the single-ended communication signal is at a second logic value, and

wherein applying the second component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal further includes applying the second component of the differential communication signal to:

the second of the two inputs of the comparator when the single-ended communication signal is at the first logic value, and

the first of the two inputs of the comparator when the single-ended communication signal is at the second logic value.

4 . The method of claim 1 , wherein generating the single-ended communication signal by applying the debouncing time to the comparison signal further includes:

detecting that the comparison signal is at a first logic value for longer than the debouncing time,

setting the single-ended communication signal to the first logic value upon detecting that the comparison signal is at the first logic value for longer than the debouncing time,

detecting that the comparison signal is at a second logic value for longer than the debouncing time, and

setting the single-ended communication signal to the second logic value upon detecting that the comparison signal is at the second logic value for longer than the debouncing time.

5 . The method of claim 1 , further comprising decoding the single-ended communication signal with a time based coding scheme.

6 . A receiver, comprising:

a first input terminal for receiving a first component of a differential communication signal;

a second input terminal for receiving a second component of the differential communication signal;

a comparator configured to generate a comparison signal by comparing the first component and the second component of the differential communication signal;

a debouncer configured to generate a single-ended communication signal by applying a debouncing time to the comparison signal; and

an offset inverter configured to:

couple the first input terminal to a first or a second of two inputs of the comparator based on the single-ended communication signal,

couple the second input terminal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, and

invert the comparison signal based on the single-ended communication signal.

7 . The receiver of claim 6 , wherein the debouncer includes:

a debouncing circuit configured to generate a first signal or a second signal based on the inverted comparison signal, and

a set-reset flip-flop configured to generate the single-ended communication signal based on the first signal and the second signal.

8 . The receiver of claim 6 , wherein the offset inverter includes an XOR gate including:

a first input coupled to an output of the comparator,

a second input coupled to an output of the debouncer, and

an output coupled to an input of the debouncer.

9 . The receiver of claim 6 , wherein the offset inverter includes a switching circuit including:

a first pair of switches configured to couple the first input terminal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, and

a second pair of switches configured to couple the second input terminal to the first or the second of the two inputs of the comparator based on the single-ended communication signal.

10 . The receiver of claim 6 , wherein, to couple the first input terminal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, the offset inverter is further configured to couple the first input terminal to:

the first of the two inputs of the comparator when the single-ended communication signal is at a first logic value, and

the second of the two inputs of the comparator when the single-ended communication signal is at a second logic value, and

wherein, to couple the second input terminal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, the offset inverter is further configured to couple the second input terminal to:

the second of the two inputs of the comparator when the single-ended communication signal is at the first logic value, and

the first of the two inputs of the comparator when the single-ended communication signal is at the second logic value.

11 . The receiver of claim 6 , further comprising:

a first resistor coupled in series between the first input terminal and the offset inverter, and

a second resistor coupled in series between the second input terminal and the offset inverter.

12 . A system, comprising:

a master controller configured to send a differential communication signal;

a communication bus; and

a local controller communicably coupled to the master controller via the communication bus, the local controller configured to:

receive the differential communication signal,

generate, with a comparator, a comparison signal by comparing a first component of the differential communication signal and a second component of the differential communication signal,

generate a single-ended communication signal by applying a debouncing time to the comparison signal, and

invert a voltage offset of the comparator based on the single-ended communication signal.

13 . The system of claim 12 , wherein the local controller is further configured to decode the single-ended communication signal with a time based coding scheme.

14 . The system of claim 12 , wherein the communication bus includes a controller area network bus.

15 . The system of claim 12 , wherein the system is a lighting system, wherein the lighting system further comprises a lighting unit including:

a plurality of light sources, and

the local controller, wherein the local controller is configured to control the plurality of light sources based on the single-ended communication signal.

16 . The system of claim 15 , wherein the lighting system is an automobile or a vehicle.

17 . The system of claim 12 , wherein, to invert the voltage offset of the comparator based on the single-ended communication signal, the local controller is further configured to:

apply the first component of the differential communication signal to a first or a second of two inputs of the comparator based on the single-ended communication signal,

apply the second component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, and

invert the comparison signal based on the single-ended communication signal.

18 . The system of claim 17 , wherein, to apply the first component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, the local controller is further configured to apply the first component of the differential communication signal to:

the first of the two inputs of the comparator when the single-ended communication signal is at a first logic value, and

the second of the two inputs of the comparator when the single-ended communication signal is at a second logic value, and

wherein, to apply the second component of the differential communication signal to the first or the second of the two inputs of the comparator based on the single-ended communication signal, the local controller is further configured to apply the second component of the differential communication signal to:

the second of the two inputs of the comparator when the single-ended communication signal is at the first logic value, and

the first of the two inputs of the comparator when the single-ended communication signal is at the second logic value.

19 . The system of claim 12 , wherein the debouncing time is based on a predetermined slope of the differential communication signal and a maximum voltage offset of the comparator.