Hybrid-emphasis equalization circuit
Embodiments included herein are directed towards a feed forward equalization (FFE) transmission circuit. The circuit may include a data serializer and data signal generator circuit and a most significant bit driver slice circuit configured to receive a first output from the data serializer and data signal generator circuit. The FFE transmission circuit may further include a least significant bit driver slice circuit configured to receive a second output from the data serializer and data signal generator circuit and a hybrid emphasis equalization slice circuit configured to receive a third output from the data serializer and data signal generator circuit.
1 . A feed forward equalization transmission circuit comprising:
a data serializer and data signal generator circuit;
a most significant bit driver slice circuit configured to receive a first output from the data serializer and data signal generator circuit;
a least significant bit driver slice circuit configured to receive a second output from the data serializer and data signal generator circuit; and
a hybrid emphasis equalization slice circuit configured to receive a third and fourth output from the data serializer and data signal generator circuit; and
wherein the hybrid emphasis equalization slice circuit includes at least two different types of emphasis.
2 . The circuit of claim 1 , wherein the at least two different types of emphasis includes de-emphasis, pre-emphasis, and edge-emphasis.
3 . The circuit of claim 1 , wherein the hybrid emphasis equalization slice circuit includes a pull-up driver and a pull-down driver.
4 . The circuit of claim 3 , wherein the pull-up driver and the pull-down driver receive a signal that adjusts an impedance of each driver.
5 . The circuit of claim 1 , wherein each of the most significant bit driver slice circuit, least significant bit driver slice circuit, and hybrid emphasis equalization slice circuit include a pre-driver and a transmission driver.
6 . The circuit of claim 1 , wherein the feed forward equalization transmission circuit is associated with a PAM3 transmitter.
7 . The circuit of claim 2 , wherein edge-emphasis corresponds to making a transition edge faster by reducing an effective impedance of the driver.
8 . The method of claim 1 , wherein the hybrid emphasis equalization slice circuit receives a tap coefficient signal.
9 . The method of claim 1 , wherein the data serializer and data signal generator circuit is configured to receive parallel input data and the data serializer and data signal generator circuit is 1 unit interval delayed.
10 . A feed forward equalization transmission method comprising:
providing a data serializer and data signal generator circuit and a most significant bit driver slice circuit configured to receive a first output from the data serializer and data signal generator circuit;
receiving, at a least significant bit driver slice circuit, a second output from the data serializer and data signal generator circuit; and
receiving, at a hybrid emphasis equalization slice circuit, a third and fourth output from the data serializer and data signal generator circuit; and
wherein the hybrid emphasis equalization slice circuit includes at least two different types of emphasis.
11 . The method of claim 10 , wherein the at least two different types of emphasis includes de-emphasis, pre-emphasis, and edge-emphasis.
12 . The method of claim 10 , wherein the hybrid emphasis equalization slice circuit includes a pull-up driver and a pull-down driver.
13 . The method of claim 12 , wherein the pull-up driver and the pull-down driver receive a signal that adjusts an impedance of each driver.
14 . The method of claim 10 , wherein each of the most significant bit driver slice circuit, least significant bit driver slice circuit, and hybrid emphasis equalization slice circuit include a pre-driver and a transmission driver.
15 . The method of claim 10 , wherein the feed forward equalization transmission circuit is associated with a PAM3 transmitter.
16 . The method of claim 11 , wherein edge-emphasis corresponds to making a transition edge faster by reducing an effective impedance of the driver.
17 . The method of claim 10 , wherein the hybrid emphasis equalization slice circuit receives a tap coefficient signal.
18 . The method of claim 10 , wherein the data serializer and data signal generator circuit is configured to receive parallel input data and the data serializer and data signal generator circuit is 1 unit interval delayed.