Three-dimensional memory device with improved signal interference
A three-dimensional memory device includes a substrate and a stack structure including alternating conductive layers and dielectric layers disposed on the substrate, and a memory string structure extending vertically through the stack structure. The memory string structure includes a conductive pillar and a storage layer disposed between the conductive pillar and the stack structure and surrounding the conductive pillar. The storage layer includes a plurality of first protruding portions at interfaces between the conductive layers and the dielectric layers.
1 . A three-dimensional memory device, comprising:
a substrate;
a stack structure disposed on the substrate and comprising a plurality of alternating conductive layers and dielectric layers; and
a memory string structure extending vertically through the stack structure, and comprising:
a conductive pillar; and
a storage layer disposed between the conductive pillar and the stack structure and surrounding the conductive pillar, wherein the storage layer comprises a plurality of first protruding portions filling first recesses respectively at interfaces between the conductive layers and the dielectric layers, wherein the conductive layers and the dielectric layers are in direct contact with each other at the interfaces.
2 . The three-dimensional memory device according to claim 1 , wherein the stack structure further comprises a plurality of interfacial layers between bottom surfaces of the conductive layers and top surfaces of the dielectric layers.
3 . The three-dimensional memory device according to claim 2 , wherein the storage layer further comprises a plurality of second protruding portions filled in second recesses between the interfacial layers, the conductive layers and the dielectric layers, wherein a depth of the second recesses is larger than a depth of the first recesses.
4 . The three-dimensional memory device according to claim 2 , wherein the conductive layers and the conductive pillar comprise tungsten, the interfacial layers comprise tungsten silicide, and the dielectric layers comprise silicon oxide.
5 . The three-dimensional memory device according to claim 1 , further comprising:
a contact pad disposed in the substrate; and
a pad layer disposed between the stack structure and the substrate, wherein the memory string structure extends through the pad layer to directly contact the contact pad.
6 . The three-dimensional memory device according to claim 5 , wherein the pad layer comprises a metal oxide layer.
7 . The three-dimensional memory device according to claim 1 , wherein the storage layer comprises a high-k dielectric material.
8 . The three-dimensional memory device according to claim 1 , wherein corners of the conductive layers that are in direct contact with the first protruding portions have rounded profiles.
9 . The three-dimensional memory device according to claim 1 , wherein the memory string structure comprises a top portion near a top surface of the stack structure and a bottom portion near a bottom surface of the stack structure that is close to the substrate, and a width of the top portion is larger than a width of the bottom portion.
10 . The three-dimensional memory device according to claim 1 , wherein a thickness of an upper one of adjacent two of the conductive layers is larger than a thickness of a lower one of the adjacent two of the conductive layers.
11 . A three-dimensional memory device, comprising:
a substrate;
a stack structure disposed on the substrate and comprising a plurality of alternating conductive layers and dielectric layers, and a plurality of interfacial layers between bottom surfaces of the conductive layers and top surfaces of the dielectric layers; and
a memory string structure extending vertically through the stack structure, and comprising:
a conductive pillar; and
a storage layer disposed between the conductive pillar and the stack structure and surrounding the conductive pillar, wherein the storage layer comprises a plurality of first protruding portions filling first recesses respectively at interfaces between the conductive layers and the dielectric layers, wherein the conductive layers and the conductive pillar comprise tungsten, the interfacial layers comprise tungsten silicide, and the dielectric layers comprise silicon oxide.
12 . The three-dimensional memory device according to claim 11 , wherein the storage layer further comprises a plurality of second protruding portions filled in second recesses between the interfacial layers, the conductive layers and the dielectric layers, wherein a depth of the second recesses is larger than a depth of the first recesses.
13 . The three-dimensional memory device according to claim 11 , further comprising:
a contact pad disposed in the substrate; and
a pad layer disposed between the stack structure and the substrate, wherein the memory string structure extends through the pad layer to directly contact the contact pad.
14 . The three-dimensional memory device according to claim 13 , wherein the pad layer comprises a metal oxide layer.
15 . The three-dimensional memory device according to claim 11 , wherein the storage layer comprises a high-k dielectric material.
16 . The three-dimensional memory device according to claim 11 , wherein corners of the conductive layers that are in direct contact with the first protruding portions have rounded profiles.
17 . The three-dimensional memory device according to claim 11 , wherein the memory string structure comprises a top portion near a top surface of the stack structure and a bottom portion near a bottom surface of the stack structure that is close to the substrate, and a width of the top portion is larger than a width of the bottom portion.
18 . The three-dimensional memory device according to claim 11 , wherein a thickness of an upper one of adjacent two of the conductive layers is larger than a thickness of a lower one of the adjacent two of the conductive layers.