Thin film transistor substrate and display device comprising the same

1 . A thin film transistor substrate comprising:

a first thin film transistor on a base substrate; and

a second thin film transistor on the first thin film transistor,

wherein the first thin film transistor includes:

a first active layer on the base substrate;

a first gate electrode spaced apart from the first active layer, the first gate electrode not being electrically connected to the first active layer; and

a first source electrode and a first drain electrode, which are spaced apart from each other and connected to the first active layer,

the second thin film transistor includes:

a second active layer on the base substrate;

a second gate electrode spaced apart from the second active layer; and

a second source electrode and a second drain electrode, which are spaced apart from each other and connected to the second active layer, and

wherein the first thin film transistor and the second thin film transistor are vertically stacked, and

all of the first active layer, the first gate electrode, the second active layer, and the second gate electrode overlap with each other, the first active layer and the second active layer are each vertically between the first gate electrode and the second gate electrode, and the first active layer and the second active layer each overlapping with both the first gate electrode and the second gate electrode, and

wherein one of the first source electrode and the first drain electrode is connected to one of the second source electrode and the second drain electrode,

the one of the first source electrode and the first drain electrode is integrally formed with the one of the second source electrode and the second drain electrode, and

the one of the second source electrode and the second drain electrode contacts a side surface of the second active layer.

2 . The thin film transistor substrate of claim 1 , wherein the first gate electrode is disposed between the base substrate and the first active layer, and

the second active layer is disposed between the first active layer and the second gate electrode.

3 . The thin film transistor substrate of claim 1 , wherein a distance between the first active layer and the second active layer is greater than a distance between the first active layer and the first gate electrode and greater than a distance between the second active layer and the second gate electrode.

4 . The thin film transistor substrate of claim 1 , wherein

the first active layer includes:

a first channel portion overlapped with the first gate electrode;

a first common connection portion connected to one side of the first channel portion; and

a first active connection portion connected to the other side of the first channel portion;

the second active layer includes:

a second channel portion overlapped with the second gate electrode;

a second common connection portion connected to one side of the second channel portion; and

a second active connection portion connected to the other side of the second channel portion; and

one of the first source electrode and the first drain electrode and one of the second source electrode and the second drain electrode are connected to the first common connection portion and the second common connection portion.

5 . The thin film transistor substrate of claim 4 , further comprising a first metal layer on the first common connection portion and the first active connection portion.

6 . The thin film transistor substrate of claim 4 , further comprising a second metal layer on the second common connection portion and the second active connection portion.

7 . The thin film transistor substrate of claim 1 , wherein the other one of the first source electrode and the first drain electrode is connected to the other one of the second source electrode and the second drain electrode.

8 . The thin film transistor substrate of claim 1 , wherein at least one of the first active layer or the second active layer includes an oxide semiconductor material.

9 . The thin film transistor substrate of claim 1 , wherein each of the first active layer and the second active layer includes an oxide semiconductor material, and the first active layer has mobility different than that of the second active layer.

10 . The thin film transistor substrate of claim 1 , wherein at least one of the first active layer or the second active layer includes:

a first oxide semiconductor layer; and

a second oxide semiconductor layer on the first oxide semiconductor layer.

11 . A display device comprising:

a thin film transistor substrate including:

a base substrate;

a first thin film transistor on the base substrate; and

a second thin film transistor on the first thin film transistor;

wherein the first thin film transistor includes:

a first active layer on the base substrate;

a first gate electrode spaced apart from the first active layer, the first gate electrode not being electrically connected to the first active layer; and

a first source electrode and a first drain electrode, which are spaced apart from each other and connected to the first active layer;

the second thin film transistor includes:

a second active layer on the base substrate;

a second gate electrode spaced apart from the second active layer; and

a second source electrode and a second drain electrode, which are spaced apart from each other and connected to the second active layer; and

wherein the first thin film transistor and the second thin film transistor are vertically stacked, and

all of the first active layer, the first gate electrode, the second active layer, and the second gate electrode overlap with each other, the first active layer and the second active layer are each vertically between the first gate electrode and the second gate electrode, and the first active layer and the second active layer each overlapping with both the first gate electrode and the second gate electrode, and

wherein one of the first source electrode and the first drain electrode is connected to one of the second source electrode and the second drain electrode,

the one of the first source electrode and the first drain electrode is integrally formed with the one of the second source electrode and the second drain electrode, and

the one of the second source electrode and the second drain electrode contacts a side surface of the second active layer.

12 . The display device of claim 11 , further comprising a gate driver on the base substrate,

wherein the gate driver includes the first thin film transistor and the second thin film transistor.

13 . The display device of claim 12 , wherein the gate driver includes two or more pull-up transistors, and

each of the first thin film transistor and the second thin film transistor is a respective pull-up transistor of the two or more pull-up transistors.

14 . The display device of claim 12 , wherein the gate driver includes two or more pull-down transistors, and

each of the first thin film transistor and the second thin film transistor is a respective pull-down transistor of the two or more pull-down transistors.

15 . The display device of claim 12 , wherein the gate driver includes two or more reset transistors, and

each of the first thin film transistor and the second thin film transistor is a respective reset transistor of the two or more reset transistors.

16 . The display device of claim 12 , wherein the gate driver includes two or more switching transistors, and

each of the first thin film transistor and the second thin film transistor is a respective switching transistor of the two or more switching transistors.

17 . The display device of claim 11 , further comprising a pixel driving circuit on the base substrate,

wherein the pixel driving circuit includes the first thin film transistor and the second thin film transistor.

18 . The display device of claim 17 , wherein the pixel driving circuit includes an internal compensation circuit.

19 . A display device comprising:

a data driver; and

a display panel including:

a base substrate;

a gate driver on the base substrate; and

a pixel on the base substrate, the pixel being electrically connected to the data driver and the gate driver,

wherein the gate driver includes a first thin film transistor on the base substrate, and a second thin film transistor on and overlapping the first thin film transistor;

wherein the first thin film transistor includes:

a first active layer;

a first gate electrode vertically separated from the first active layer; and

a first source/drain electrode in contact with the first active layer;

wherein the second thin film transistor includes:

a second active layer overlapping the first active layer;

a second gate electrode vertically separated from the second active layer; and

a second source/drain electrode in contact with the second active layer and in contact with the first source/drain electrode; and

wherein the first thin film transistor and the second thin film transistor are vertically stacked, and

all of the first active layer, the first gate electrode, the second active layer, and the second gate electrode overlap with each other,

wherein the first source/drain electrode is connected to the second source/drain electrode at one contact hole,

the first source/drain electrode is integrally formed with the second source/drain electrode, and

the second source/drain electrode contacts a lateral surface of the second active layer,

wherein the first gate electrode and the second gate electrode are integrally formed to be a common gate electrode,

wherein the common gate electrode is disposed between the first active layer and the second active layer, and

the first thin film transistor and the second thin film transistor are configured to be simultaneously turned on by a gate voltage applied to the common gate electrode.