IP Library › Granted Patent US 12677531

Granted Patent B2

US 12677531 · App. 17/641,874 · Granted Jul 7, 2026

Array substrate, display apparatus, and method of fabricating array substrate

Inventors: Chienyu Chen (Beijing, CN); Yaohong Tan (Beijing, CN); Mingche Hsieh (Beijing, CN); Yinglong Huang (Beijing, CN); Wen Sun (Beijing, CN); Jenyu Lee (Beijing, CN); Guoren Hu (Beijing, CN)

Assignees: Mianyang BOE Optoelectronics Technology Co., Ltd.; BOE Technology Group Co., Ltd.

H10K50/18 H10K59/1201 H10K59/122 H10K59/173

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Quick Facts

Patent No.: US 12677531
App. No.: 17/641,874
Granted: Jul 7, 2026
Kind: B2

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Abstract

An array substrate is provided. The array substrate includes an anode layer including a plurality of anodes on the base substrate, a respective anode being at least partially in a respective subpixel region; a carrier transport blocking layer on a side of the anode layer away from the base substrate, the carrier transport blocking layer at least partially blocking carrier transport; a pixel definition layer on a side of the carrier transport blocking layer away from the base substrate, the pixel definition layer defining subpixel apertures, a respective subpixel aperture exposing at least a portion of the respective anode; and an organic layer including at least a first portion in the respective subpixel region and on a side of the anode layer away from the base substrate.

Claims (76)

1 . An array substrate comprising a plurality of subpixels, a respective subpixel comprising a respective light emitting diode;

the array substrate comprises:

a base substrate;

an anode layer comprising a plurality of anodes on the base substrate, a respective anode being at least partially in a respective subpixel region;

a carrier transport blocking layer on a side of the anode layer away from the base substrate, the carrier transport blocking layer at least partially blocking carrier transport;

a pixel definition layer on a side of the carrier transport blocking layer away from the base substrate, the pixel definition layer defining subpixel apertures, a respective subpixel aperture exposing at least a portion of the respective anode; and

an organic layer comprising at least a first portion in the respective subpixel region and on a side of the anode layer away from the base substrate;

wherein an orthographic projection of the pixel definition layer on the base substrate at least partially overlaps with an orthographic projection of the carrier transport blocking layer on the base substrate;

the orthographic projection of the carrier transport blocking layer on the base substrate at least partially overlaps with an orthographic projection of the anode layer on the base substrate;

an area where the orthographic projection of the carrier transport blocking layer on the base substrate overlaps with the orthographic projection of the anode layer on the base substrate is greater than an area where the orthographic projection of the pixel definition layer on the base substrate overlaps with the orthographic projection of the anode layer on the base substrate;

the organic layer further comprises a second portion at least partially in a respective edge sub-region surrounding the respective subpixel region, the second portion at least partially surrounding the first portion;

in the respective edge sub-region, the carrier transport blocking layer is stacked on the respective anode, the second portion is stacked on the carrier transport blocking layer, the carrier transport blocking layer electrically insulating the second portion from the respective anode, thereby at least partially blocking carrier transport in the second portion;

the organic layer comprises at least an organic material sub-layer, a first sub-portion of the organic material sub-layer in the first portion, a second sub-portion of the organic material sub-layer in the second portion;

the first sub-portion and the second sub-portion are in a same sub-layer and comprise a same material;

the first sub-portion and the second sub-portion are at least partially segregated from each other at an edge of the carrier transport blocking layer;

an orthographic projection of at least a part of the second sub-portion on the base substrate is non-overlapping with the orthographic projection of the pixel definition layer on the base substrate, and at least partially overlaps with the orthographic projection of the carrier transport blocking layer on the base substrate; and

the first sub-portion and the second sub-portion are in contact with the carrier transport blocking layer.

2 . The array substate of claim 1 , comprising an inter-subpixel region;

wherein the inter-subpixel region comprises a plurality of edge sub-regions, a respective edge sub-region surrounding the respective subpixel region; and

in the respective edge sub-region, an orthographic projection of the respective anode on the base substrate partially overlaps with an orthographic projection of the carrier transport blocking layer on the base substrate, and partially overlaps with an orthographic projection of the pixel definition layer on the base substrate.

3 . The array substrate of claim 2 , wherein the respective edge sub-region comprises an inner sub-region surrounding the respective subpixel region, and an outer sub-region surrounding the inner sub-region; and

the pixel definition layer is present in the outer sub-region and absent in the inner sub-region.

4 . The array substrate of claim 1 , wherein the organic layer further comprises a second portion at least partially in a respective edge sub-region surrounding the respective subpixel region, the second portion at least partially surrounding the first portion; and

5 . The array substrate of claim 4 , wherein an orthographic projection of the carrier transport blocking layer on the base substrate covers an orthographic projection of the second portion on the base substrate; and

an orthographic projection of the respective anode on the base substrate partially overlaps with the orthographic projection of the second portion on the base substrate.

6 . The array substrate of claim 4 , wherein

an orthographic projection of the first sub-portion on the base substrate is non-overlapping with the orthographic projection of the carrier transport blocking layer on the base substrate.

7 . The array substrate of claim 1 , wherein the pixel definition layer comprises a tapered portion at least partially in a respective edge sub-region surrounding the respective subpixel region;

the tapered portion has a first surface in contact with the carrier transport blocking layer and a second surface connected to the first surface, the second surface in contact with a second portion of the organic layer; and

the second surface has an average slope angle with respect to the first surface of less than 60 degrees and greater than 1 degrees.

8 . The array substrate of claim 7 , wherein the organic layer further comprises a second portion at least partially in a respective edge sub-region surrounding the respective subpixel region; and

the second portion is at least partially stacked on the tapered portion in an outer sub-region of the respective edge sub-region, and at least partially stacked on the carrier transport blocking layer in an inner sub-region of the respective edge sub-region.

9 . The array substrate of claim 1 , wherein the orthographic projection of the anode layer on the base substrate is non-overlapping with the orthographic projection of the pixel definition layer on the base substrate.

10 . The array substrate of claim 1 , wherein the organic layer further comprises a second portion on a side of the carrier transport blocking layer away from the base substrate;

the pixel definition layer has a first surface in contact with the carrier transport blocking layer and a second surface connected to the first surface, the second surface being in contact with the second portion; and

the second surface has an average slope angle with respect to the first surface of greater 30 degrees and less than 150 degrees.

11 . The array substrate of claim 10 , wherein the organic layer further comprises a third portion on a side of the pixel definition layer away from the base substrate;

the first sub-portion, the second sub-portion, and the third sub-portion are in a same sub-layer and comprise a same material;

the second sub-portion and the third sub-portion are at least partially segregated from each other at an edge of the pixel definition layer.

12 . The array substrate of claim 1 , wherein an orthographic projection of a surface of the pixel definition layer on a side away from the base substrate on the base substrate covers an orthographic projection of a surface of the pixel definition layer on a side closer to the base substrate on the base substrate; and

in a cross-section along a plane intersecting two adjacent subpixel regions and perpendicular to the base substrate, at least a portion of the pixel definition layer has an inverse trapezoidal shape.

13 . The array substrate of claim 1 , comprising a recess recessing into at least a portion of the pixel definition layer;

the organic layer further comprises second portion at least partially in the recess and a third portion on top of the pixel definition layer;

the first sub-portion and the second sub-portion are at least partially discontinuous sub-portions at least partially segregated due to presence of the carrier transport blocking layer; and

the second sub-portion and the third sub-portion are at least partially discontinuous sub-portions at least partially segregated due to presence of the recess.

14 . The array substrate of claim 1 , wherein an orthographic projection of the anode layer on the base substrate covers an orthographic projection of the carrier transport blocking layer on the base substrate; and

an orthographic projection of at least a portion of the pixel definition layer on the base substrate is non-overlapping with the orthographic projection of the carrier transport blocking layer on the base substrate.

15 . The array substate of claim 1 , comprising an inter-subpixel region;

wherein the inter-subpixel region comprises a plurality of edge sub-regions, a respective edge sub-region surrounding the respective subpixel region; and

the carrier transport blocking layer is limited to the plurality of edge sub-regions.

16 . The array substrate of claim 1 , wherein the carrier transport blocking layer includes a plurality of ring structures spaced apart from each other by the pixel definition layer.

17 . The array substrate of claim 1 , further comprising a cathode layer on a side of the organic layer away from the base substrate;

the cathode layer has a protrusion, an orthographic projection of the protrusion on the base substrate at least partially overlaps with an orthographic projection of an edge of the carrier transport blocking layer on the base substrate; and

the edge is an edge of the carrier transport blocking layer surrounding the respective subpixel region.

18 . The array substrate of claim 1 , further comprising an encapsulating layer on a side of the cathode layer away from the base substrate;

the encapsulating layer has a protrusion, an orthographic projection of the protrusion on the base substrate at least partially overlaps with an orthographic projection of an edge of the carrier transport blocking layer on the base substrate; and

the edge is an edge of the carrier transport blocking layer surrounding the respective subpixel region.

19 . A display apparatus, comprising the array substrate of claim 1 , and one or more integrated circuits connected to the array substrate.

20 . A method of fabricating an array substrate comprising a plurality of subpixels, a respective subpixel comprising a respective light emitting diode, comprising:

forming an anode layer comprising a plurality of anodes on a base substrate, a respective anode being at least partially in a respective subpixel region;

forming a carrier transport blocking layer on a side of the anode layer away from the base substrate, the carrier transport blocking layer at least partially blocking carrier transport;

forming a pixel definition layer on a side of the carrier transport blocking layer away from the base substrate, the pixel definition layer defining subpixel apertures, a respective subpixel aperture exposing at least a portion of the respective anode; and

forming an organic layer comprising at least a first portion in the respective subpixel region and on a side of the anode layer away from the base substrate;

the orthographic projection of the carrier transport blocking layer on the base substrate at least partially overlaps with an orthographic projection of the anode layer on the base substrate; and

the organic layer comprises at least an organic material sub-layer, a first sub- portion of the organic material sub-layer in the first portion, a second sub-portion of the organic material sub-layer in the second portion;

the first sub-portion and the second sub-portion are in a same sub-layer and comprise a same material;

the first sub-portion and the second sub-portion are at least partially segregated from each other at an edge of the carrier transport blocking layer;

the first sub-portion and the second sub-portion are in contact with the carrier transport blocking layer.