IP Library Granted Patent US 12677600
Granted Patent B2
US 12677600 · App. 18/518,349 · Granted Jul 7, 2026

Tunable Josephson junction with added dopants

Inventor: Charles Thomas Rettner (San Jose, CA)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H10N60/805H10N60/0912H10N60/12
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Quick Facts
Patent No.
US 12677600
App. No.
18/518,349
Granted
Jul 7, 2026
Kind
B2
Abstract

A Josephson junction device includes a substrate, a base electrode layer, a top electrode layer, a tunnel barrier layer between the base electrode layer and the top electrode layer, and a dopant layer.

Claims (33)

1 . A Josephson junction device comprising:

a substrate;

a base electrode layer;

a top electrode layer;

a tunnel barrier layer between the base electrode layer and the top electrode layer; and

a dopant layer, wherein the dopant layer is located between the base electrode layer and the substrate or is located within the top electrode layer.

2 . The Josephson junction device of claim 1 , wherein the dopant layer is located within the top electrode layer.

3 . The Josephson junction device of claim 1 , wherein the dopant layer is operative to change a response of a resistance of the Josephson junction device to heating.

4 . The Josephson junction device of claim 1 , wherein the dopant layer is made of silicon or germanium.

5 . The Josephson junction device of claim 1 , wherein the dopant layer is made of magnesium, copper, or zirconium.

6 . The Josephson junction device of claim 1 , wherein, the Josephson junction device is annealed.

7 . The Josephson junction device of claim 1 , wherein the base electrode layer has a thickness of about 20 to about 50 nanometers.

8 . The Josephson junction device of claim 1 , wherein the dopant layer has a thickness of about 1 nanometer to about 10 nanometers.

9 . The Josephson junction device of claim 1 , wherein the top electrode layer has a thickness of about 50 nanometers to about 100 nanometers.

10 . A method of fabricating a Josephson junction device, the method comprising:

forming a dopant layer over a substrate;

forming a base electrode layer over the dopant layer;

forming a tunnel barrier layer over the base electrode layer; and

forming a top electrode layer over the tunnel barrier layer.

11 . The method of claim 10 , further comprising, upon forming the top electrode layer, annealing the Josephson junction device.

12 . The method of claim 10 , wherein forming the dopant layer further comprises tuning a response of a resistance of the Josephson junction device to heating.

13 . The method of claim 10 , wherein the dopant layer is made of silicon or germanium.

14 . The method of claim 10 , wherein the dopant layer is made of magnesium, copper, or zirconium.

15 . A method of fabricating a Josephson junction device, the method comprising:

forming a base electrode layer over a substrate;

forming a tunnel barrier layer over the base electrode layer;

forming a first portion of a top electrode layer over the tunnel barrier layer;

forming a dopant layer over the first portion; and

forming a second portion of the top electrode layer over the dopant layer.

16 . The method of claim 15 , further comprising, upon forming the second portion of the top electrode layer, annealing the Josephson junction device.

17 . The method of claim 15 , wherein forming the dopant layer further comprises tuning a response of a resistance of the Josephson junction device to heating.

18 . The method of claim 15 , wherein the dopant layer is made of silicon or germanium.

19 . The method of claim 15 , wherein the dopant layer is made of magnesium, copper, or zirconium.