IP Library Granted Patent US 12677613
Granted Patent B2
US 12677613 · App. 18/402,992 · Granted Jul 7, 2026

Heat dissipation for field effect transistors

Inventors: Kai-Fang Cheng (Taoyuan District, TW); Hsiao-Kang Chang (Hsinchu City, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
H10P14/69391H10D30/4732H10P14/3414H10P14/6329H10P14/6514H10P14/6538H10P14/662
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Quick Facts
Patent No.
US 12677613
App. No.
18/402,992
Granted
Jul 7, 2026
Kind
B2
Abstract

Semiconductor devices and methods of forming the same are provided. A method of the present disclosure includes depositing an aluminum nitride layer over a substrate, treating the aluminum nitride layer to convert a top portion of the aluminum nitride layer to an aluminum oxynitride layer, depositing a III-V semiconductor layer on the aluminum oxynitride layer, and forming a gate structure over the III-V semiconductor layer.

Claims (43)

1 . A method, comprising:

depositing an aluminum nitride layer over a substrate;

treating the aluminum nitride layer to convert a top portion of the aluminum nitride layer to an aluminum oxynitride layer;

depositing a III-V semiconductor layer on the aluminum oxynitride layer; and

forming a gate structure over the III-V semiconductor layer.

2 . The method of claim 1 , wherein the depositing of the aluminum nitride layer comprises use of physical vapor deposition (PVD).

3 . The method of claim 1 , wherein the treating comprises exposing the aluminum nitride layer to ultraviolet (UV) ray exposure in presence of argon (Ar) or helium (He).

4 . The method of claim 1 , wherein the treating comprises treating the aluminum nitride layer with a nitrous oxide (N 2 O) plasma.

5 . The method of claim 1 , further comprising:

before the forming of the gate structure, forming a source contact and a drain contact through the III-V semiconductor layer.

6 . The method of claim 5 , wherein, after the forming of the source contact and the drain contact, the source contact and the drain contact are in direct contact with the aluminum nitride layer.

7 . The method of claim 1 , wherein the aluminum nitride layer comprises a thickness between about 40 Å and about 60 Å.

8 . The method of claim 1 , wherein the aluminum oxynitride layer comprises a thickness between about 20 Å and about 40 Å.

9 . The method of claim 1 , wherein the substrate comprises silicon, silicon carbide or sapphire.

10 . A method, comprising:

depositing a multilayer over a substrate, wherein the multilayer comprises:

a plurality of aluminum nitride layers, and

a plurality of aluminum oxynitride layers interleaving the plurality of aluminum nitride layers;

depositing a III-V semiconductor layer on the aluminum oxynitride layer; and

forming a gate structure over the III-V semiconductor layer.

11 . The method of claim 10 ,

wherein the depositing of the multilayer comprises a plurality of process cycles,

wherein each of the plurality of process cycles comprises:

depositing an aluminum nitride layer over the substrate, and

treating the aluminum nitride layer to convert a top portion of the aluminum nitride layer to an aluminum oxynitride layer.

12 . The method of claim 11 , wherein the depositing of the aluminum nitride layer comprises use of physical vapor deposition (PVD).

13 . The method of claim 11 , wherein the treating comprises exposing the aluminum nitride layer to ultraviolet (UV) ray exposure in presence of argon (Ar) or helium (He).

14 . The method of claim 11 , wherein the treating comprises treating the aluminum nitride layer with a nitrous oxide (N 2 O) plasma.

15 . The method of claim 11 , wherein a number of the plurality of aluminum nitride layers is the same as a number of the plurality of aluminum oxynitride layers.

16 . The method of claim 11 , further comprising:

before the forming of the gate structure, depositing a channel layer over the III-V semiconductor layer,

wherein the channel layer comprises gallium nitride (GaN), aluminum nitride (AlN), or aluminum gallium nitride (AlGaN),

wherein the III-V semiconductor layer comprises aluminum gallium nitride (AlGaN).

17 . A semiconductor device, comprising:

a substrate;

a multilayer disposed over the substrate, the multilayer comprising a plurality of aluminum nitride layer interleaved by a plurality of aluminum oxynitride layers;

a III-V semiconductor layer over the multilayer; and

a gate structure over the III-V semiconductor layer.

18 . The semiconductor device of claim 17 , wherein the III-V semiconductor layer comprises aluminum gallium nitride (AlGaN).

19 . The semiconductor device of claim 17 , wherein a thickness of each of the plurality of aluminum nitride layers is greater than a thickness of each of the plurality of aluminum oxynitride layers.

20 . The semiconductor device of claim 19 ,

wherein the thickness of each of the plurality of aluminum nitride layers is between about 40 Å and about 60 Å,

wherein the thickness of each of the plurality of aluminum oxynitride layers is between about 20 Å and about 40 Å.