Isolation structure of semiconductor device and method for fabricating the same
An isolation structure of a semiconductor device includes a substrate, a first isolation structure and a second isolation structure. The substrate has a first region and a second region, and there is a boundary between the first region and the second region. The first isolation structure is disposed in the first region of the substrate, and the first isolation structure includes a dielectric liner and a first insulating layer. The second isolation structure is disposed in the second region of the substrate, and the second isolation structure includes a second insulating layer. The first isolation structure and the second isolation structure are respectively located on both sides of the boundary.
1 . An isolation structure of a semiconductor device, comprising:
a substrate having a first region and a second region, wherein there is a boundary between the first region and the second region;
a first isolation structure disposed in the first region of the substrate, wherein the first isolation structure comprises a dielectric liner and a first insulating layer; and
a second isolation structure disposed in the second region of the substrate, wherein the second isolation structure comprises a second insulating layer, the first isolation structure and the second isolation structure are respectively located on both sides of the boundary, a boundary structure is defined between the first isolation structure and the second isolation structure, a width of the boundary structure is less than or equal to 50 nm, the boundary structure is not a fin structure, a first sidewall of the boundary structure directly contacts a side surface of the first isolation structure, a second sidewall of the boundary structure opposite to the first sidewall directly contacts a side surface of the second isolation structure, and the boundary structure has a triangular cross section formed by the first sidewall and the second sidewall.
2 . The isolation structure of the semiconductor device of claim 1 , wherein an inclined degree of the side surface of the first isolation structure relative to a top surface of the substrate is less than an inclined degree of the side surface of the second isolation structure relative to the top surface of the substrate.
3 . The isolation structure of the semiconductor device of claim 1 , wherein a material of the dielectric liner comprises an oxide or a nitride.
4 . The isolation structure of the semiconductor device of claim 1 , wherein a material of the dielectric liner is different from a material of the first insulating layer.
5 . The isolation structure of the semiconductor device of claim 1 , wherein a material of the first insulating layer is identical to a material of the second insulating layer.
6 . The isolation structure of the semiconductor device of claim 5 , wherein the material of the first insulating layer comprises an oxide.
7 . The isolation structure of the semiconductor device of claim 1 , wherein a height of the first isolation structure is greater than a height of the second isolation structure.
8 . The isolation structure of the semiconductor device of claim 1 , wherein a width of the first isolation structure is greater than a width of the second isolation structure.
9 . The isolation structure of the semiconductor device of claim 1 , wherein a distance between the first isolation structure and the second isolation structure is less than or equal to 50 nm.
10 . The isolation structure of the semiconductor device of claim 1 , wherein an operation voltage of the first region is greater than an operation voltage of the second region.
11 . The isolation structure of the semiconductor device of claim 1 , further comprising:
a fin structure disposed in the second region, and the second isolation structure surrounds the fin structure.