Terraced conductor structure for semiconductor devices

1 . A semiconductor device, comprising:

a metal line having a longitudinal axis, the metal line including:

a first segment extending in a direction of the longitudinal axis and having a first cross-section, the first cross-section including a wider side and a narrower side, and a trapezoidal shape; and

a second segment extending in a direction of the longitudinal axis and having a second cross-section, the second cross-section including a wider side and a narrower side, the narrower side of the second segment being formed in contact with the wider side of the first segment such that a portion of the wider side of the first segment extends beyond the narrower side of the second segment to form a terrace, and the terrace and a tapered sidewall of the second segment form an acute angle.

2 . The semiconductor device as recited in claim 1 , wherein the first cross-section is disposed within a first interlevel dielectric layer.

3 . The semiconductor device as recited in claim 2 , wherein the second cross-section is disposed within a second interlevel dielectric layer having a different material than the first interlevel dielectric layer.

4 . The semiconductor device as recited in claim 1 , further comprising a third segment disposed on the wider side of the second cross-section.

5 . The semiconductor device as recited in claim 4 , wherein the third segment includes a straight sidewall perpendicular to the wider side of the second cross-section.

6 . The semiconductor device as recited in claim 1 , wherein the metal line includes Ru.

7 . The semiconductor device as recited in claim 1 , further comprising a diffusion barrier between the metal line and an interlevel dielectric layer.

8 . The semiconductor device as recited in claim 7 , wherein the diffusion barrier includes different materials between the first segment and the second segment.

9 . The semiconductor device as recited in claim 1 , further comprising at least one other segment extending in a direction of the longitudinal axis and having an associated cross-section, the associated cross-section including a wider side and a narrower side, the narrower side being formed in contact with the wider side of a previous segment such that a portion of the wider side extends beyond the narrower side of the previous segment to form a terrace, and the terrace and a tapered sidewall of the previous segment form an acute angle.

10 . A semiconductor device, comprising:

a plurality of parallel conductive lines spaced in accordance with a pitch dimension, each of the plurality of conductive lines including:

a first segment having a first cross-section, the first cross-section including a wider side and a narrower side, and a trapezoidal shape;

a second segment having a second cross-section, the second cross-section including a wider side and a narrower side, the narrower side being formed in contact with the wider side of the first segment such that a portion of the wider side of the first segment extends beyond the narrower side of the second segment to form a terrace and the terrace and a tapered sidewall of the second segment form an acute angle; and

a third segment disposed on the wider side of the second cross-section.

11 . The semiconductor device as recited in claim 10 , wherein the first cross-section is disposed within a first interlevel dielectric layer.

12 . The semiconductor device as recited in claim 11 , wherein the second cross-section is disposed within a second interlevel dielectric layer having a different material than the first interlevel dielectric layer.

13 . The semiconductor device as recited in claim 10 , wherein the third segment includes a straight sidewall perpendicular to the wider side of the second cross-section.

14 . The semiconductor device as recited in claim 10 , wherein each of the plurality of conductive lines includes a diffusion barrier between the conductive line and an interlevel dielectric layer.

15 . A method for forming a semiconductor device, comprising:

depositing a first dielectric layer on a substrate;

opening tapered trenches in the first dielectric layer;

filling the tapered trenches with a first conductive material to form a first segment having a first cross-section, the first cross-section including a wider side and a narrower side, and a trapezoidal shape;

depositing a second dielectric layer on the first dielectric layer and the first conductive material of the first segment;

opening tapered trenches in the second dielectric layer and exposing the first conductive material of the first segment;

depositing a second conductive material in the tapered trenches to contact the first segment and over the second dielectric layer;

patterning the second conductive material to form a second segment having a second cross-section, the second cross-section including a wider side and a narrower side; and

depositing a third dielectric layer over the second segment.

16 . The method as recited in claim 15 , wherein each of the second cross-section includes a trapezoidal shape.

17 . The method as recited in claim 15 , wherein patterning the second conductive material includes patterning a third segment with the second segment, the third segment having straight sidewalls.

18 . The method as recited in claim 15 , wherein the wider side of the first segment extends beyond the narrower side of the second segment to form a terrace and the terrace and a tapered sidewall of the second segment form an acute angle.