Semiconductor die assemblies with molded semiconductor dies and associated methods and systems
Semiconductor die assemblies with molded semiconductor dies, and associated methods and systems are disclosed. In some embodiments, a semiconductor die assembly includes a package substrate and a controller die attached to the package substrate. The semiconductor die assembly comprises a mold structure including the controller die and having a surface facing away from the package substrate. The controller die may be completely encased within the mold structure. Further, one or more stacks of semiconductor dies (e.g., memory dies) are attached to the surface of the mold structure. Accordingly, the semiconductor die assembly does not include support structures for the stacks of semiconductor dies attached above the controller die.
1 . A semiconductor die assembly, comprising:
a package substrate;
a first semiconductor die directly attached to an upper surface of the package substrate by a plurality of interconnects disposed between the first semiconductor die and the package substrate;
a first monolithic mold structure directly contacting the upper surface of the package substrate, the first monolithic mold structure completely enclosing the first semiconductor die, having a plurality of vertical sidewalls laterally spaced apart from the first semiconductor die, and having a planar surface above the first semiconductor die and facing away from the package substrate;
a stack of second semiconductor dies directly attached to the planar surface of the first monolithic mold structure by an adhesive film, wherein a lowest second semiconductor die of the stack includes a vertical sidewall coplanar with one of the plurality of vertical sidewalls of the first monolithic mold structure and a bottom surface facing the package substrate, the bottom surface being completely supported by the first monolithic mold structure; and
a second monolithic mold structure directly contacting the upper surface of the package substrate and the planar surface of the first monolithic mold structure, and enclosing the first monolithic mold structure and the stack of second semiconductor dies,
wherein the stack of second semiconductor dies is a first stack of second semiconductor dies, and wherein the semiconductor die assembly further includes a second stack of second semiconductor dies attached to the planar surface of the first monolithic mold structure.
2 . The semiconductor die assembly of claim 1 , wherein the adhesive film completely covers the bottom surface of the lowest second semiconductor die of the stack.
3 . The semiconductor die assembly of claim 1 , wherein the first monolithic mold structure comprises a first molding region including a footprint of the first semiconductor die and one or more second molding regions next to the first molding region.
4 . The semiconductor die assembly of claim 3 , wherein one or more substrate regions of the package substrate corresponding to the one or more second molding regions of the first monolithic mold structure include conductive traces coupled to the first semiconductor die, the conductive traces configured to provide signal paths for the first semiconductor die.
5 . The semiconductor die assembly of claim 1 , wherein the planar surface of the first monolithic mold structure has a first height from the package substrate and the first semiconductor die has a second height from the package substrate, the second height being less than the first height.
6 . The semiconductor die assembly of claim 1 , wherein the package substrate comprises an area uncovered by the first monolithic mold structure, the area including at least one third semiconductor die attached to the package substrate.
7 . The semiconductor die assembly of claim 1 , wherein the package substrate comprises an area uncovered by the first monolithic mold structure, the area including a plurality of substrate bond pads connected to a plurality of bond pads of the second semiconductor dies of the stack by a plurality of bond wires.
8 . The semiconductor die assembly of claim 1 , wherein the stack of second semiconductor dies include at least two second semiconductor dies attached to each other by an adhesive film, and wherein an edge of an upper second semiconductor die extends past a corresponding edge of a lower second semiconductor die such that a plurality of bond pads of the lower second semiconductor die is uncovered by the upper second semiconductor die.
9 . The semiconductor die assembly of claim 1 , wherein the first semiconductor die includes a memory controller die and the second semiconductor dies include semiconductor memory dies.
10 . A method, comprising:
directly attaching a first semiconductor die to an upper surface of a package substrate by a plurality of interconnects disposed between the first semiconductor die and the package substrate, the package substrate including a plurality of substrate bond pads;
forming a first monolithic mold structure directly contacting the upper surface of the package substrate, the first monolithic mold structure enclosing the first semiconductor die and having a planar surface facing away from the package substrate;
directly attaching a stack of second semiconductor dies to the planar surface of the first monolithic mold structure with an adhesive film, wherein a lowest second semiconductor die of the stack includes a bottom surface facing the package substrate, the bottom surface being completely supported by the first monolithic mold structure; and
forming a second monolithic mold structure directly contacting the upper surface of the package substrate and the planar surface of the first monolithic mold structure, and enclosing the first monolithic mold structure and the stack of second semiconductor dies.
11 . The method of claim 10 , further comprising:
forming, prior to forming the second monolithic mold structure, a plurality of bond wires connecting individual substrate bond pads of the plurality to corresponding bond pads of the second semiconductor dies of the stack, wherein the plurality of substrate bond pads is located in an area of the package substrate uncovered by the first monolithic mold structure.
12 . The method of claim 10 , further comprising:
attaching, prior to forming the second monolithic mold structure, at least one third semiconductor die to an area of the package substrate uncovered by the first monolithic mold structure.
13 . A semiconductor die assembly, comprising:
a package substrate;
a controller die directly attached to an upper surface the package substrate by a plurality of interconnects disposed between a first semiconductor die and the package substrate;
a first monolithic mold structure directly contacting the upper surface of the package substrate, the first monolithic mold structure completely enclosing the controller die, having a plurality of vertical sidewalls laterally spaced apart from the first semiconductor die, and having a planar surface above the controller die and facing away from the package substrate;
a stack of memory dies directly attached to the planar surface of the first monolithic mold structure by an adhesive film, wherein a lowest second semiconductor die of the stack includes a vertical sidewall coplanar with one of the plurality of vertical sidewalls of the first monolithic mold structure and a bottom surface facing the package substrate, the bottom surface being completely supported by the first monolithic mold structure; and
a second monolithic mold structure directly contacting the upper surface of the package substrate and the planar surface of the first monolithic mold structure, and enclosing the first monolithic mold structure and the stack of memory dies.
14 . The semiconductor die assembly of claim 13 , wherein the adhesive film completely covers the bottom surface of the lowest second semiconductor die of the stack.
15 . The semiconductor die assembly of claim 13 , wherein the first monolithic mold structure comprises a first molding region including a footprint of the controller die and one or more second molding regions next to the first molding region.
16 . The semiconductor die assembly of claim 15 , wherein one or more substrate regions of the package substrate corresponding to the one or more second molding regions of the first monolithic mold structure include conductive traces coupled to the controller die, the conductive traces configured to provide signal paths for the controller die.
17 . The semiconductor die assembly of claim 13 , wherein the planar surface of the first monolithic mold structure has a first height from the package substrate and the controller die has a second height from the package substrate, the second height being less than the first height.
18 . The semiconductor die assembly of claim 13 , wherein the package substrate comprises an area uncovered by the first monolithic mold structure, the area including at least one second memory die attached to the package substrate, and wherein the at least one second memory die is a different kind than the memory dies of the stack.
19 . The semiconductor die assembly of claim 13 , wherein the package substrate comprises an area uncovered by the first monolithic mold structure, the area including a plurality of substrate bond pads coupled to a plurality of bond pads of the stack of memory dies by a plurality of bond wires.