IP Library › Granted Patent US 12677699
Granted Patent B2
US 12677699 · App. 17/955,253 · Granted Jul 7, 2026

Silicon carbide power devices integrated with silicon logic devices

Inventors: Abhishek Anil Sharma (Portland, OR); Tahir Ghani (Portland, OR); Anand Murthy (Portland, OR); Wilfred Gomes (Portland, OR); Sagar Suthram (Portland, OR); Pushkar Ranade (San Jose, CA)
Assignee: Intel Corporation
H10W90/00H10W20/023H10W20/20H10W20/427H10W80/312H10W80/327H10W90/288H10W90/297H10W90/792
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Quick Facts
Patent No.
US 12677699
App. No.
17/955,253
Filed
Sep 28, 2022
Granted
Jul 7, 2026
Kind
B2
Art Unit
2818
USPC
257/777
Abstract

An embodiment of an integrated circuit (IC) device may include a plurality of layers of wide bandgap (WBG)-based circuitry and a plurality of layers of silicon (Si)-based circuitry monolithically bonded to the plurality of layers of WBG-based circuitry, with one or more electrical connections between respective WBG-based circuits in the plurality of layers of WBG-based circuitry and Si-based circuits in the plurality of layers of Si-based circuitry. In some embodiments, a wafer-scale WBG-based IC is hybrid bonded or layer transfer bonded to a wafer-scale Si-based IC. Other embodiments are disclosed and claimed.

Claims (40)

1 . An integrated circuit (IC) device, comprising:

a plurality of layers of wide bandgap (WBG)-based circuitry;

a plurality of layers of silicon (Si)-based circuitry monolithically bonded to the plurality of layers of WBG-based circuitry, with one or more electrical connections between respective WBG-based circuits in the plurality of layers of WBG-based circuitry and Si-based circuits in the plurality of layers of Si-based circuitry; and

a through-WBG via (TWBGV) through one or more layers of the plurality of layers of WBG-based circuitry to provide at least one of the one or more electrical connections between respective WBG-based circuits and Si-based circuits.

2 . The IC device of claim 1 , wherein the plurality of layers of Si-based circuitry is hybrid bonded to the plurality of layers of WBG-based circuitry.

3 . The IC device of claim 1 , wherein the plurality of layers of Si-based circuitry is layer transfer bonded to the plurality of layers of WBG-based circuitry.

4 . The IC device of claim 1 , further comprising:

dielectric material that surrounds the TWBGV, wherein the dielectric material has sufficient thickness to inhibit a breakdown of the dielectric material.

5 . The IC device of claim 1 , wherein the plurality of layers of WBG-based circuitry is bonded to a back-side of the plurality of layers of Si-based circuitry.

6 . The IC device of claim 1 , wherein the plurality of layers of WBG-based circuitry comprises a wafer-scale WBG-based IC and the plurality of layers of Si-based circuitry comprises a wafer-scale Si-based IC.

7 . A system, comprising:

a power supply;

a wafer-scale wide bandgap (WBG)-based integrated circuit (IC) coupled to the power supply;

a wafer-scale silicon (Si)-based (IC) monolithically bonded to the wafer-scale WBG-based IC, with one or more electrical connections between respective WBG-based circuits in the wafer-scale WBG-based IC and Si-based circuits in the wafer-scale Si-based IC; and

a cooling structure operable to remove heat from the wafer-scale WBG-based IC and the wafer-scale Si-based IC to achieve an operating temperature at or below −25° C.

8 . The system of claim 7 , wherein a power device on the wafer-scale WBG-based IC is coupled to a logic device on the wafer-scale Si-based IC.

9 . The system of claim 7 , wherein the wafer-scale WBG-based IC is hybrid bonded to the wafer-scale Si-based IC.

10 . The system of claim 9 , wherein a first side of the wafer-scale WBG-based IC is hybrid bonded to the wafer-scale Si-based IC and a second side of the wafer-scale WBG-based IC, opposite to the first side of the wafer-scale WBG-based IC, has a non-flat surface.

11 . The system of claim 7 , wherein the wafer-scale WBG-based IC is layer transfer bonded to the wafer-scale Si-based IC.

12 . The system of claim 7 , wherein the wafer-scale WBG-based IC is bonded to a back-side of the wafer-scale Si-based IC.

13 . The system of claim 7 , wherein the cooling structure further comprises a chiller mounted to the wafer-scale WBG-based IC and the wafer-scale Si-based IC, the chiller comprising one of a solid body comprising microchannels to convey a heat transfer fluid therein or a heat sink for immersion in a low-boiling point liquid.

14 . The IC device of claim 1 , further comprising:

a power supply and/or a cooling structure.

15 . An integrated circuit (IC) device, comprising:

a plurality of layers of wide bandgap (WBG)-based circuitry; and

a plurality of layers of silicon (Si)-based circuitry monolithically bonded to the plurality of layers of WBG-based circuitry, with one or more electrical connections between respective WBG-based circuits in the plurality of layers of WBG-based circuitry and Si-based circuits in the plurality of layers of Si-based circuitry, wherein the plurality of layers of Si-based circuitry is layer transfer bonded to the plurality of layers of WBG-based circuitry or wherein the plurality of layers of WBG-based circuitry is bonded to a back-side of the plurality of layers of Si-based circuitry.

16 . The IC device of claim 15 , further comprising:

a through-WBG via (TWBGV) through one or more layers of the plurality of layers of WBG-based circuitry to provide at least one of the one or more electrical connections between respective WBG-based circuits and Si-based circuits; and

dielectric material that surrounds the TWBGV, wherein the dielectric material has sufficient thickness to inhibit a breakdown of the dielectric material.

17 . The IC device of claim 15 , wherein the plurality of layers of WBG-based circuitry comprises a wafer-scale WBG-based IC and the plurality of layers of Si-based circuitry comprises a wafer-scale Si-based IC.

18 . The IC device of claim 1 , further comprising:

a power supply and/or a cooling structure.

19 . A system, comprising:

a power supply;

a wafer-scale wide bandgap (WBG)-based integrated circuit (IC) coupled to the power supply; and

a wafer-scale silicon (Si)-based (IC) monolithically bonded to the wafer-scale WBG-based IC, with one or more electrical connections between respective WBG-based circuits in the wafer-scale WBG-based IC and Si-based circuits in the wafer-scale Si-based IC, wherein a first side of the wafer-scale WBG-based IC is hybrid bonded to the wafer-scale Si-based IC and a second side of the wafer-scale WBG-based IC, opposite to the first side of the wafer-scale WBG-based IC, has a non-flat surface, wherein the wafer-scale WBG-based IC is layer transfer bonded to the wafer-scale Si-based IC, or wherein the wafer-scale WBG-based IC is bonded to a back-side of the wafer-scale Si-based IC.

20 . The system of claim 19 , wherein a power device on the wafer-scale WBG-based IC is coupled to a logic device on the wafer-scale Si-based IC.

21 . The system of claim 19 , further comprising:

a cooling structure operable to remove heat from the wafer-scale WBG-based IC and the wafer-scale Si-based IC to achieve an operating temperature at or below −25° C.

22 . The system of claim 21 , wherein the cooling structure further comprises a chiller mounted to the wafer-scale WBG-based IC and the wafer-scale Si-based IC, the chiller comprising one of a solid body comprising microchannels to convey a heat transfer fluid therein or a heat sink for immersion in a low-boiling point liquid.